XC7A12T
AMDArtix-7The XC7A12T is an Artix-7 FPGA from AMD, built on a 28 nm process. It provides 8,000 LUT6 look-up tables (12,800 logic cells), 16,000 flip-flops, 0.7 Mb of block RAM and 40 DSP slices. It offers up to 150 user I/O pins and 2 GTP transceivers at up to 6.6 Gb/s, with hard PCI Express Gen2 blocks. It is available in 2 packages, from the CPG238 (10 × 10 mm) to the CSG325 (15 × 15 mm). Temperature grades: commercial, extended, industrial. Designs are built with AMD Vivado.
Specifications
| Vendor | AMD |
|---|---|
| Family | Artix-7 |
| Series | 7 Series |
| Process | 28 nm |
| Configuration memory | SRAM |
| LUT4-equivalent capacity | 12,800 |
| Look-up tables (LUT6) | 8,000 |
| Logic cells | 12,800 |
| Flip-flops | 16,000 |
| Distributed RAM | 171 Kb |
| Block RAM | 0.7 Mb (20 × 36 Kb) |
| DSP (DSP slice) | 40 |
| Clock management tiles | 3 |
| Max. user I/O | 150 |
|---|---|
| Differential pairs | 72 |
| GTP transceivers | 2 × 6.6 Gb/s |
| PCI Express | Gen2 |
| Analog / monitor | XADC |
| Design tool | AMD Vivado |
Packages
| Package | Size (mm) | Pitch (mm) | User I/O | Transceivers |
|---|---|---|---|---|
| CPG238 | 10 × 10 | 0.5 | 112 | 2 |
| CSG325 | 15 × 15 | 0.8 | 150 | 2 |
Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).
Speed and temperature grades
| Temperature grade | Junction range | Speed grades |
|---|---|---|
| Commercial (C) | 0 to 85 °C | -1, -2 |
| Extended (E) | 0 to 100 °C | -2L, -3 |
| Industrial (I) | −40 to 100 °C | -1, -2, -1L |
Alternatives to the XC7A12T
Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.
| Device | LUT4-eq. | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe |
|---|---|---|---|---|---|---|---|
| EP4CGX22Altera Cyclone IV | 21K 21K LUT4 | 21K LE | 40 | 0.7 Mb | 150 | 4 XCVR 3.125 Gb/s | Gen2 |
| LFMXO5-20TDLattice MachXO5-NX | 16.7K 16.7K LUT4 | 20K LC | 48 | 0.7 Mb | 368 | 1 SERDES | Gen2 |
| LFE5UM-25Lattice ECP5 | 24K 24K LUT4 | — | 28 | 1 Mb | 197 | 2 SERDES 3.2 Gb/s | — |
| LFE5UM5G-25Lattice ECP5 | 24K 24K LUT4 | — | 28 | 1 Mb | 197 | 2 SERDES 5 Gb/s | — |
| LFE5U-12Lattice ECP5 | 12K 12K LUT4 | — | 28 | 0.6 Mb | 197 | — | — |
| GW5AT-15Gowin Arora V | 15.1K 15.1K LUT4 | — | 28 | 0.6 Mb | 53 | 4 SERDES 12.5 Gb/s | Gen3 |
Compare side by side: XC7A12T vs EP4CGX22, XC7A12T vs LFMXO5-20TD, XC7A12T vs LFE5UM-25, XC7A12T vs GW5AT-15.
XC7A12T quick facts
How many LUTs does the XC7A12T have?
The XC7A12T has 8,000 LUT6 look-up tables, about 12,800 LUT4 equivalents (12,800 logic cells as published by AMD).
How many DSP blocks does the XC7A12T have?
The XC7A12T has 40 DSP slices and 0.7 Mb of block RAM.
Does the XC7A12T have transceivers?
Yes, 2 GTP transceivers at up to 6.6 Gb/s.
What are the alternatives to the XC7A12T?
Devices of similar size in other families include EP4CGX22 (Altera Cyclone IV), LFMXO5-20TD (Lattice MachXO5-NX), LFE5UM-25 (Lattice ECP5).
Which software is used to design with the XC7A12T?
Designs for the XC7A12T are built with AMD Vivado.
Other Artix-7 devices
| Device | LUT4-eq. | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe |
|---|---|---|---|---|---|---|---|
| XC7A12T | 12.8K 8K LUT6 | 12.8K LC | 40 | 0.7 Mb | 150 | 2 GTP 6.6 Gb/s | Gen2 |
| XC7A15T | 16.6K 10.4K LUT6 | 16.6K LC | 45 | 0.9 Mb | 250 | 4 GTP 6.6 Gb/s | Gen2 |
| XC7A25T | 23.4K 14.6K LUT6 | 23.4K LC | 80 | 1.6 Mb | 150 | 4 GTP 6.6 Gb/s | Gen2 |
| XC7A35T | 33.3K 20.8K LUT6 | 33.3K LC | 90 | 1.8 Mb | 250 | 4 GTP 6.6 Gb/s | Gen2 |
| XC7A50T | 52.2K 32.6K LUT6 | 52.2K LC | 120 | 2.6 Mb | 250 | 4 GTP 6.6 Gb/s | Gen2 |
| XC7A75T | 75.5K 47.2K LUT6 | 75.5K LC | 180 | 3.7 Mb | 300 | 8 GTP 6.6 Gb/s | Gen2 |
| XC7A100T | 101K 63.4K LUT6 | 101K LC | 240 | 4.7 Mb | 300 | 8 GTP 6.6 Gb/s | Gen2 |
| XC7A200T | 215K 135K LUT6 | 215K LC | 740 | 12.8 Mb | 500 | 16 GTP 6.6 Gb/s | Gen2 |
Source: AMD 7 Series FPGAs Product Selection Guide, XMP101 (v1.8). Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.