FPGA & adaptive SoC databook · online editionRev. 2026.10

5CGTD9 vs XCSU200P

A comparison of the Altera Cyclone V 5CGTD9 and the AMD Spartan UltraScale+ XCSU200P using the data from both vendors' selection guides.

Side-by-side specifications

5CGTD9XCSU200P
Vendor / familyAltera Cyclone VAMD Spartan UltraScale+
Logic (LUT4-equivalent)227,120160,000
LUTs as published113,560 ALMs100,000 LUT6
Vendor logic figure301,000 LE219,000 SLC
DSP342 variable-precision DSP blocks384 DSP slices
Block RAM11.9 Mb6.8 Mb
Large RAM—18 Mb
Max. user I/O560572
Transceivers12 × XCVR 6.144 Gb/s8 × GTH 16.3 Gb/s
Hard PCI ExpressGen2Gen4 x8, Gen4 x4
Hard processorNoneNone
Process28 nm16 nm
Configuration memorySRAMSRAM
Packages55
Design toolAltera Quartus PrimeAMD Vivado

Highlighted values are higher. Logic is compared in LUT4 equivalents; see how FPGA vendors count logic.

Key differences

The 5CGTD9 has about 42% more logic capacity (227K vs 160K LUT4 equivalents).

They use different logic architectures: the 5CGTD9 is built from ALMs and the XCSU200P from LUT6, so the raw LUT counts (114K vs 100K) are not directly comparable.

For arithmetic, the XCSU200P has 384 DSP slices against 342 variable-precision DSP blocks on the 5CGTD9.

The XCSU200P has more on-chip memory (24.8 Mb vs 11.9 Mb).

Both have transceivers: 12 at up to 6.144 Gb/s on the 5CGTD9 and 8 at up to 16.3 Gb/s on the XCSU200P.

The 5CGTD9 is designed with Altera Quartus Prime and the XCSU200P with AMD Vivado.

Full specifications

See the complete spec sheets with packages and grades: 5CGTD9 (Cyclone V) and XCSU200P (Spartan UltraScale+).