LFMXO5-20TD vs XCSU25P
A comparison of the Lattice MachXO5-NX LFMXO5-20TD and the AMD Spartan UltraScale+ XCSU25P using the data from both vendors' selection guides.
Side-by-side specifications
| LFMXO5-20TD | XCSU25P | |
|---|---|---|
| Vendor / family | Lattice MachXO5-NX | AMD Spartan UltraScale+ |
| Logic (LUT4-equivalent) | 16,667 | 16,000 |
| LUTs as published | 16,667 LUT4 | 10,000 LUT6 |
| Vendor logic figure | 20,000 LC | 22,000 SLC |
| DSP | 48 18×18 multipliers | 36 DSP slices |
| Block RAM | 0.7 Mb | 1.7 Mb |
| Large RAM | 0.5 Mb | — |
| Max. user I/O | 368 | 304 |
| Transceivers | 1 × SERDES | None |
| Hard PCI Express | Gen2 | None |
| Hard processor | None | None |
| Process | 28 nm | 16 nm |
| Configuration memory | Internal flash | SRAM |
| Packages | 3 | 3 |
| Design tool | Lattice Radiant | AMD Vivado |
Highlighted values are higher. Logic is compared in LUT4 equivalents; see how FPGA vendors count logic.
Key differences
Both devices offer similar logic capacity: 16.7K and 16K LUT4 equivalents.
They use different logic architectures: the LFMXO5-20TD is built from LUT4 and the XCSU25P from LUT6, so the raw LUT counts (16.7K vs 10K) are not directly comparable.
For arithmetic, the LFMXO5-20TD has 48 18×18 multipliers against 36 DSP slices on the XCSU25P.
The XCSU25P has more on-chip memory (1.7 Mb vs 1.2 Mb).
Only the LFMXO5-20TD has multi-gigabit transceivers (1).
Configuration memory: internal flash on the LFMXO5-20TD, sram on the XCSU25P.
The LFMXO5-20TD is designed with Lattice Radiant and the XCSU25P with AMD Vivado.
Full specifications
See the complete spec sheets with packages and grades: LFMXO5-20TD (MachXO5-NX) and XCSU25P (Spartan UltraScale+).