Ti1250 vs XCZU19EG
A comparison of the Efinix Titanium Ti1250 and the AMD Zynq UltraScale+ MPSoC XCZU19EG using the data from both vendors' selection guides.
Side-by-side specifications
| Ti1250 | XCZU19EG | |
|---|---|---|
| Vendor / family | Efinix Titanium | AMD Zynq UltraScale+ MPSoC |
| Logic (LUT4-equivalent) | 1,233,020 | 836,800 |
| LUTs as published | — LUT4 | 523,000 LUT6 |
| Vendor logic figure | 1,233,020 LE | 1,143,000 SLC |
| DSP | 2,380 DSP blocks | 1,968 DSP slices |
| Block RAM | 73.1 Mb | 34.6 Mb |
| Large RAM | — | 36 Mb |
| Max. user I/O | 480 | 668 |
| Transceivers | 40 × SERDES 25.8 Gb/s | 44 × GTH 16.3 Gb/s, 28 × GTY 32.75 Gb/s |
| Hard PCI Express | Gen4 x8 | Gen3 x16 |
| Hard processor | 4× RISC-V RV64 | 4× Arm Cortex-A53 |
| Process | 16 nm | 16 nm |
| Configuration memory | SRAM | SRAM |
| Packages | 2 | 4 |
| Design tool | Efinix Efinity | AMD Vivado |
Highlighted values are higher. Logic is compared in LUT4 equivalents; see how FPGA vendors count logic.
Key differences
The Ti1250 has about 47% more logic capacity (1233K vs 837K LUT4 equivalents).
They use different logic architectures: the Ti1250 is built from LUT4 and the XCZU19EG from LUT6, so the raw LUT counts (— vs 523K) are not directly comparable.
For arithmetic, the Ti1250 has 2,380 DSP blocks against 1,968 DSP slices on the XCZU19EG.
Both have transceivers: 40 at up to 25.8 Gb/s on the Ti1250 and 72 at up to 32.75 Gb/s on the XCZU19EG.
The Ti1250 is designed with Efinix Efinity and the XCZU19EG with AMD Vivado.
Full specifications
See the complete spec sheets with packages and grades: Ti1250 (Titanium) and XCZU19EG (Zynq UltraScale+ MPSoC).