XCZU19EG

AMDZynq UltraScale+ MPSoCSoC

The XCZU19EG is a Zynq UltraScale+ MPSoC FPGA from AMD, built on a 16 nm process. It provides 523,000 LUT6 look-up tables (1,143,000 system logic cells), about 836,800 LUT4 equivalents, 1,045,000 flip-flops, 34.6 Mb of block RAM plus 36 Mb of UltraRAM and 1,968 DSP slices. Its processing system includes four Arm Cortex-A53 cores running at up to 1.5 GHz, a dual Arm Cortex-R5F real-time processor and a Mali-400 MP2 GPU. The processing system adds its own PCIe Gen2 x4, 2x USB 3.0, SATA 3.1, DisplayPort, 4x Gigabit Ethernet, with 4 PS-GTR transceivers at 6 Gb/s. The programmable logic offers up to 668 user I/O pins and 72 GTH/GTY transceivers at up to 32.75 Gb/s, with hard PCI Express Gen3 x16 blocks. It is available in 4 packages, from the B1517 (40 × 40 mm) to the E1924 (45 × 45 mm). Temperature grades: extended, industrial. Designs are built with AMD Vivado.

837KLUT4-equivalent

523KLUTs (LUT6)

1,968DSP slices

36 MbUltraRAM

34.6 MbBlock RAM

668Max. user I/O

72Transceivers (32.75 Gb/s)

4× A53Hard processor

Specifications

Vendor	AMD
Family	Zynq UltraScale+ MPSoC
Series	UltraScale+
Process	16 nm
Configuration memory	SRAM
LUT4-equivalent capacity	836,800
Look-up tables (LUT6)	523,000
System logic cells	1,143,000
Flip-flops	1,045,000
Distributed RAM	10,035 Kb
Block RAM	34.6 Mb
UltraRAM	36 Mb
DSP (DSP slice)	1,968
Clock management tiles	11

Max. user I/O	668
GTH transceivers	44 × 16.3 Gb/s
GTY transceivers	28 × 32.75 Gb/s
PCI Express (PL)	3× Gen3 x16
150G Interlaken	4
100G Ethernet MAC	4
Analog / monitor	System Monitor
Hard processor	4× Arm Cortex-A53 @ 1.5 GHz
PS-GTR transceivers	4 × 6 Gb/s
PS connectivity	PCIe Gen2 x4, 2x USB 3.0, SATA 3.1, DisplayPort, 4x Gigabit Ethernet
Real-time processor	Dual Arm Cortex-R5F
GPU	Mali-400 MP2
Design tool	AMD Vivado

Packages

Package	Size (mm)	User I/O	PS I/O	Transceivers
B1517	40 × 40	644	214	16
C1760	42.5 × 42.5	512	214	48
D1760	42.5 × 42.5	308	214	72
E1924	45 × 45	668	214	44

Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).

Speed and temperature grades

Temperature grade	Junction range	Speed grades
Extended (E)	0 to 100 °C	-1, -2, -2L, -3
Industrial (I)	−40 to 100 °C	-1, -1L, -2

Alternatives to the XCZU19EG

Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.

Device	LUT4-eq.	Vendor logic	DSP	Block RAM	Max I/O	Transceivers	PCIe
SX 850Altera Stratix 10 GX/SX	570K 285K ALMs	841K LE	2,016	68 Mb	688	48 XCVR/XCVR 28.3 Gb/s	Gen3
SX 1100Altera Stratix 10 GX/SX	899K 449K ALMs	1325K LE	2,592	107 Mb	688	48 XCVR/XCVR 28.3 Gb/s	Gen3
Ti1250Efinix Titanium	≈1233K 1233K LEs	1233K LE	2,380	73.1 Mb	480	40 SERDES 25.8 Gb/s	Gen4
AGF 008Altera Agilex 7 F-Series	518K 259K ALMs	765K LE	2,296	74 Mb	576	32 XCVR 58 Gb/s	—
XCVC2802AMD Versal AI Core	833K 521K LUT6	1139K SLC	1,312	21 Mb	530	32 GTYP 32.75 Gb/s	Gen5
XCVE2802AMD Versal AI Edge	833K 521K LUT6	1139K SLC	1,312	21.1 Mb	530	32 GTYP 32.75 Gb/s	Gen4

Compare side by side: XCZU19EG vs SX 850, XCZU19EG vs SX 1100, XCZU19EG vs Ti1250.

XCZU19EG quick facts

How many LUTs does the XCZU19EG have?

The XCZU19EG has 523,000 LUT6 look-up tables, about 836,800 LUT4 equivalents (1,143,000 system logic cells as published by AMD).

How many DSP blocks does the XCZU19EG have?

The XCZU19EG has 1,968 DSP slices and 34.6 Mb of block RAM plus 36 Mb of UltraRAM.

Does the XCZU19EG have transceivers?

Yes, 72 GTH/GTY transceivers at up to 32.75 Gb/s.

Does the XCZU19EG have a processor?

Yes. It includes a hard 4× Arm Cortex-A53 processor.

What are the alternatives to the XCZU19EG?

Devices of similar size in other families include SX 850 (Altera Stratix 10 GX/SX), SX 1100 (Altera Stratix 10 GX/SX), Ti1250 (Efinix Titanium).

Which software is used to design with the XCZU19EG?

Designs for the XCZU19EG are built with AMD Vivado.

Other Zynq UltraScale+ MPSoC devices

Device	LUT4-eq.	Vendor logic	DSP	Block RAM	Max I/O	Transceivers	PCIe
XCZU1CG	59.2K 37K LUT6	81K SLC	216	3.8 Mb	180	—	—
XCZU1EG	59.2K 37K LUT6	81K SLC	216	3.8 Mb	180	—	—
XCZU2CG	75.2K 47K LUT6	103K SLC	240	5.3 Mb	252	—	—
XCZU2EG	75.2K 47K LUT6	103K SLC	240	5.3 Mb	252	—	—
XCZU3CG	114K 71K LUT6	154K SLC	360	7.6 Mb	252	—	—
XCZU3EG	114K 71K LUT6	154K SLC	360	7.6 Mb	252	—	—
XCZU3TCG	115K 72K LUT6	157K SLC	576	5.1 Mb	124	8 GTH 16.3 Gb/s	Gen3
XCZU3TEG	115K 72K LUT6	157K SLC	576	5.1 Mb	124	8 GTH 16.3 Gb/s	Gen3
XCZU4CG	141K 88K LUT6	192K SLC	728	4.5 Mb	252	16 GTH 16.3 Gb/s	Gen3
XCZU4EG	141K 88K LUT6	192K SLC	728	4.5 Mb	252	16 GTH 16.3 Gb/s	Gen3
XCZU4EV	141K 88K LUT6	192K SLC	728	4.5 Mb	252	16 GTH 16.3 Gb/s	Gen3
XCZU5CG	187K 117K LUT6	256K SLC	1,248	5.1 Mb	252	16 GTH 16.3 Gb/s	Gen3
XCZU5EG	187K 117K LUT6	256K SLC	1,248	5.1 Mb	252	16 GTH 16.3 Gb/s	Gen3
XCZU5EV	187K 117K LUT6	256K SLC	1,248	5.1 Mb	252	16 GTH 16.3 Gb/s	Gen3
XCZU6CG	344K 215K LUT6	469K SLC	1,973	25.1 Mb	328	24 GTH 16.3 Gb/s	—
XCZU6EG	344K 215K LUT6	469K SLC	1,973	25.1 Mb	328	24 GTH 16.3 Gb/s	—
XCZU7CG	368K 230K LUT6	504K SLC	1,728	11 Mb	464	24 GTH 16.3 Gb/s	Gen3
XCZU7EG	368K 230K LUT6	504K SLC	1,728	11 Mb	464	24 GTH 16.3 Gb/s	Gen3
XCZU7EV	368K 230K LUT6	504K SLC	1,728	11 Mb	464	24 GTH 16.3 Gb/s	Gen3
XCZU9CG	438K 274K LUT6	600K SLC	2,520	32.1 Mb	328	24 GTH 16.3 Gb/s	—
XCZU9EG	438K 274K LUT6	600K SLC	2,520	32.1 Mb	328	24 GTH 16.3 Gb/s	—
XCZU11EG	478K 299K LUT6	653K SLC	2,928	21.1 Mb	512	48 GTH/GTY 32.75 Gb/s	Gen3
XCZU15EG	546K 341K LUT6	747K SLC	3,528	26.2 Mb	328	24 GTH 16.3 Gb/s	—
XCZU17EG	677K 423K LUT6	926K SLC	1,590	28 Mb	668	72 GTH/GTY 32.75 Gb/s	Gen3
XCZU19EG	837K 523K LUT6	1143K SLC	1,968	34.6 Mb	668	72 GTH/GTY 32.75 Gb/s	Gen3

Source: AMD Zynq UltraScale+ MPSoC Product Selection Guide, XMP104 (v2.8). Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.