Altera Agilex 3 FPGAs
The Altera Agilex 3 family has 5 devices, built on the Intel 7 process, ranging from 8.5K ALMs to 45.8K ALMs and from 34 to 184 variable-precision DSP blocks. It uses adaptive logic modules (ALMs). Transceivers: XCVR, up to 12.5 Gb/s.
| Device | LUT4-eq. | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe |
|---|---|---|---|---|---|---|---|
| A3C 025 | 17K 8.5K ALMs | 25.1K LE | 34 | 1.3 Mb | 256 | — | — |
| A3C 050 | 32K 16K ALMs | 47.2K LE | 65 | 2.4 Mb | 256 | — | — |
| A3C 065 | 44.4K 22.2K ALMs | 65.5K LE | 88 | 3.3 Mb | 256 | — | — |
| A3C 100 | 68K 34K ALMs | 100K LE | 138 | 5.1 Mb | 392 | 4 XCVR 12.5 Gb/s | Gen3 |
| A3C 135 | 91.6K 45.8K ALMs | 135K LE | 184 | 6.9 Mb | 392 | 4 XCVR 12.5 Gb/s | Gen3 |
Source: Altera Agilex 3 FPGAs and SoCs C-Series Product Table, 2026.02.11.