A3C 100

AlteraAgilex 3

The A3C 100 is an Agilex 3 FPGA from Altera, built on the Intel 7 process. It provides 34,000 adaptive logic modules (ALMs) (100,300 logic elements (LEs)), about 68,000 LUT4 equivalents, 136,000 flip-flops, 5.1 Mb of block RAM and 138 variable-precision DSP blocks. Versions with the optional hard processor system include two Arm Cortex-A55 cores. The programmable logic offers up to 392 user I/O pins and 4 XCVR transceivers at up to 12.5 Gb/s, with hard PCI Express Gen3 x4 blocks. It is available in 3 packages, from the M16A (16 × 16 mm) to the B23C (23 × 23 mm). Designs are built with Altera Quartus Prime.

68KLUT4-equivalent

34KALMs

138variable-precision DSP blocks

5.1 MbBlock RAM

392Max. user I/O

4Transceivers (12.5 Gb/s)

2× A55Hard processor

Specifications

Vendor	Altera
Family	Agilex 3
Series	Agilex
Process	Intel 7
Configuration memory	SRAM
LUT4-equivalent capacity	68,000
Adaptive logic modules (ALMs)	34,000
LUT note	Adaptive logic modules (ALMs): fracturable 8-input LUTs; each ALM can implement two 4-input functions
Logic elements (LEs)	100,300
Flip-flops	136,000
Distributed RAM	1,249 Kb
Block RAM	5.1 Mb (262 × 20 Kb)
DSP (variable-precision DSP block)	138

Max. user I/O	392
XCVR transceivers	4 × 12.5 Gb/s
PCI Express (PL)	Gen3 x4
Analog / monitor	None
Hard processor	2× Arm Cortex-A55 (optional, HPS variants)
Design tool	Altera Quartus Prime

Packages

Package	Size (mm)	User I/O	PS I/O	Transceivers
M16A	16 × 16	232	48	4
B18A	18 × 18	208	—	—
B23C	23 × 23	344	48	4

Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).

Alternatives to the A3C 100

Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.

Device	LUT4-eq.	Vendor logic	DSP	Block RAM	Max I/O	Transceivers	PCIe
A5E 008BAltera Agilex 5 E-Series	57.8K 28.9K ALMs	85.2K LE	116	4.5 Mb	392	4 XCVR 17 Gb/s	Gen4
A5E 013AAltera Agilex 5 E-Series	93.6K 46.8K ALMs	138K LE	188	7 Mb	392	4 XCVR 28 Gb/s	Gen4
A5E 013BAltera Agilex 5 E-Series	93.6K 46.8K ALMs	138K LE	188	7 Mb	392	4 XCVR 17 Gb/s	Gen4
5CSXC6Altera Cyclone V	83.8K 41.9K ALMs	110K LE	112	5.4 Mb	288	9 XCVR 3.125 Gb/s	Gen1
5CSTD6Altera Cyclone V	83.8K 41.9K ALMs	110K LE	112	5.4 Mb	288	9 XCVR 6.144 Gb/s	Gen2
5CSXC5Altera Cyclone V	64.1K 32.1K ALMs	85K LE	87	3.9 Mb	288	9 XCVR 3.125 Gb/s	Gen1

Compare side by side: A3C 100 vs A5E 008B, A3C 100 vs A5E 013A, A3C 100 vs A5E 013B, A3C 100 vs 5CSXC6, A3C 100 vs 5CSTD6, A3C 100 vs 5CSXC5.

A3C 100 quick facts

How many LUTs does the A3C 100 have?

The A3C 100 has 34,000 adaptive logic modules (ALMs), about 68,000 LUT4 equivalents (100,300 logic elements (les) as published by Altera).

How many DSP blocks does the A3C 100 have?

The A3C 100 has 138 variable-precision DSP blocks and 5.1 Mb of block RAM.

Does the A3C 100 have transceivers?

Yes, 4 XCVR transceivers at up to 12.5 Gb/s.

Does the A3C 100 have a processor?

Yes. Variants with the optional hard processor system include a 2× Arm Cortex-A55 processor.

What are the alternatives to the A3C 100?

Devices of similar size in other families include A5E 008B (Altera Agilex 5 E-Series), A5E 013A (Altera Agilex 5 E-Series), A5E 013B (Altera Agilex 5 E-Series).

Which software is used to design with the A3C 100?

Designs for the A3C 100 are built with Altera Quartus Prime.

Other Agilex 3 devices

Device	LUT4-eq.	Vendor logic	DSP	Block RAM	Max I/O	Transceivers	PCIe
A3C 025	17K 8.5K ALMs	25.1K LE	34	1.3 Mb	256	—	—
A3C 050	32K 16K ALMs	47.2K LE	65	2.4 Mb	256	—	—
A3C 065	44.4K 22.2K ALMs	65.5K LE	88	3.3 Mb	256	—	—
A3C 100	68K 34K ALMs	100K LE	138	5.1 Mb	392	4 XCVR 12.5 Gb/s	Gen3
A3C 135	91.6K 45.8K ALMs	135K LE	184	6.9 Mb	392	4 XCVR 12.5 Gb/s	Gen3

Source: Altera Agilex 3 FPGAs and SoCs C-Series Product Table, 2026.02.11. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.