FPGA & adaptive SoC databook · online editionRev. 2026.10

10CX085 vs Mach-N2 MH06

A comparison of the Altera Cyclone 10 GX 10CX085 and the Lattice Mach-N2 Mach-N2 MH06 using the data from both vendors' selection guides.

Side-by-side specifications

10CX085Mach-N2 MH06
Vendor / familyAltera Cyclone 10 GXLattice Mach-N2
LUTs as published31,000 ALMs40,000 LUT4
LUT typeadaptive logic module: fracturable 8-input LUT (one 6-input or two independent 4-input functions)4-input look-up table
LUT4 equivalent (approx.)≈62,000≈40,000
CoreScore (SERV cores)——
Vendor logic figure85,000 LE65,000 LC
DSP84 variable-precision DSP blocks120 18×18 multipliers
Block RAM5.7 Mb4 Mb
Large RAM——
Max. user I/O192196
Transceivers6 × XCVR 12.5 Gb/s4 × SERDES 16 Gb/s
Hard PCI ExpressGen2 x4None
Hard processorNoneNone
Process20 nm16 nm
Configuration memorySRAMInternal flash
Packages22
Design toolAltera Quartus PrimeLattice Radiant

Highlighted values are higher. LUT counts are shown as published; the LUT4 equivalent is an approximation to compare different LUT types, see how FPGA vendors count logic. Add up to two more devices to this comparison.

Key differences

The 10CX085 has about 55% more logic capacity (62K vs 40K LUT4 equivalents).

They use different logic architectures: the 10CX085 is built from ALMs and the Mach-N2 MH06 from LUT4, so the raw LUT counts (31K vs 40K) are not directly comparable.

For arithmetic, the Mach-N2 MH06 has 120 18×18 multipliers against 84 variable-precision DSP blocks on the 10CX085.

The 10CX085 has more on-chip memory (5.7 Mb vs 4 Mb).

Both have transceivers: 6 at up to 12.5 Gb/s on the 10CX085 and 4 at up to 16 Gb/s on the Mach-N2 MH06.

Configuration memory: sram on the 10CX085, internal flash on the Mach-N2 MH06.

The 10CX085 is designed with Altera Quartus Prime and the Mach-N2 MH06 with Lattice Radiant.

Full specifications

See the complete spec sheets with packages and grades: 10CX085 (Cyclone 10 GX) and Mach-N2 MH06 (Mach-N2).