FPGA & adaptive SoC databook · online editionRev. 2026.10

A5D 110 vs XCZU28DR

A comparison of the Altera Agilex 5 D-Series A5D 110 and the AMD Zynq UltraScale+ RFSoC XCZU28DR using the data from both vendors' selection guides.

Side-by-side specifications

A5D 110XCZU28DR
Vendor / familyAltera Agilex 5 D-SeriesAMD Zynq UltraScale+ RFSoC
LUTs as published364,000 ALMs425,000 LUT6
LUT typeadaptive logic module: fracturable 8-input LUT (one 6-input or two independent 4-input functions)6-input look-up table, fracturable into two LUT5 with shared inputs
LUT4 equivalent (approx.)≈728,000≈680,000
CoreScore (SERV cores)——
Vendor logic figure1,073,800 LE930,000 SLC
DSP3,312 variable-precision DSP blocks4,272 DSP slices
Block RAM104.3 Mb38 Mb
Large RAM—22.5 Mb
Max. user I/O616347
Transceivers24 × XCVR 28 Gb/s16 × GTY 28.21 Gb/s
Hard PCI ExpressGen4 x4, Gen4 x8Gen3 x16
Hard processor4× Arm Cortex-A76 + Cortex-A55 (optional)4× Arm Cortex-A53
ProcessIntel 716 nm
Configuration memorySRAMSRAM
Packages02
Design toolAltera Quartus PrimeAMD Vivado

Highlighted values are higher. LUT counts are shown as published; the LUT4 equivalent is an approximation to compare different LUT types, see how FPGA vendors count logic. Add up to two more devices to this comparison.

Key differences

Both devices offer similar logic capacity: 728K and 680K LUT4 equivalents.

They use different logic architectures: the A5D 110 is built from ALMs and the XCZU28DR from LUT6, so the raw LUT counts (364K vs 425K) are not directly comparable.

For arithmetic, the XCZU28DR has 4,272 DSP slices against 3,312 variable-precision DSP blocks on the A5D 110.

The A5D 110 has more on-chip memory (104.3 Mb vs 60.5 Mb).

Both have transceivers: 24 at up to 28 Gb/s on the A5D 110 and 16 at up to 28.21 Gb/s on the XCZU28DR.

The A5D 110 is designed with Altera Quartus Prime and the XCZU28DR with AMD Vivado.

Full specifications

See the complete spec sheets with packages and grades: A5D 110 (Agilex 5 D-Series) and XCZU28DR (Zynq UltraScale+ RFSoC).