CCGM1A9 vs GW2AN-18X
A comparison of the Cologne Chip GateMate CCGM1A9 and the Gowin Arora II GW2AN-18X using the data from both vendors' selection guides.
Side-by-side specifications
| CCGM1A9 | GW2AN-18X | |
|---|---|---|
| Vendor / family | Cologne Chip GateMate | Gowin Arora II |
| LUTs as published | 184,320 CPEs | 20,736 LUT4 |
| LUT type | Cologne Chip programmable element: 8-input LUT tree, or two 4-input LUT trees | 4-input look-up table |
| LUT4 equivalent (approx.) | ≈368,640 | ≈20,736 |
| CoreScore (SERV cores) | — | — |
| Vendor logic figure | — | — |
| DSP | — DSP blocks | — 18×18 multipliers |
| Block RAM | 11.2 Mb | 0.5 Mb |
| Large RAM | — | — |
| Max. user I/O | 1,458 | 389 |
| Transceivers | 9 × SerDes 5 Gb/s | None |
| Hard PCI Express | None | None |
| Hard processor | None | None |
| Process | 28 nm | 55 nm |
| Configuration memory | SRAM | SRAM |
| Packages | 0 | 7 |
| Design tool | Yosys + nextpnr (open source) | Gowin EDA |
Highlighted values are higher. LUT counts are shown as published; the LUT4 equivalent is an approximation to compare different LUT types, see how FPGA vendors count logic. Add up to two more devices to this comparison.
Key differences
The CCGM1A9 has about 1678% more logic capacity (369K vs 20.7K LUT4 equivalents).
They use different logic architectures: the CCGM1A9 is built from CPEs and the GW2AN-18X from LUT4, so the raw LUT counts (184K vs 20.7K) are not directly comparable.
The CCGM1A9 has more on-chip memory (11.2 Mb vs 0.5 Mb).
Only the CCGM1A9 has multi-gigabit transceivers (9 5 Gb/s).
The CCGM1A9 is designed with Yosys + nextpnr (open source) and the GW2AN-18X with Gowin EDA.
Full specifications
See the complete spec sheets with packages and grades: CCGM1A9 (GateMate) and GW2AN-18X (Arora II).