LFMXO5-100T vs XCSU100P
A comparison of the Lattice MachXO5-NX LFMXO5-100T and the AMD Spartan UltraScale+ XCSU100P using the data from both vendors' selection guides.
Side-by-side specifications
| LFMXO5-100T | XCSU100P | |
|---|---|---|
| Vendor / family | Lattice MachXO5-NX | AMD Spartan UltraScale+ |
| Logic (LUT4-equivalent) | 80,000 | 73,600 |
| LUTs as published | 80,000 LUT4 | 46,000 LUT6 |
| Vendor logic figure | 96,000 LC | 101,000 SLC |
| DSP | 156 18×18 multipliers | 144 DSP slices |
| Block RAM | 3.7 Mb | 5.1 Mb |
| Large RAM | 3.5 Mb | — |
| Max. user I/O | 297 | 478 |
| Transceivers | 2 × SERDES | 4 × GTH 16.3 Gb/s |
| Hard PCI Express | Gen2 | Gen4 x4 |
| Hard processor | None | None |
| Process | 28 nm | 16 nm |
| Configuration memory | Internal flash | SRAM |
| Packages | 1 | 5 |
| Design tool | Lattice Radiant | AMD Vivado |
Highlighted values are higher. Logic is compared in LUT4 equivalents; see how FPGA vendors count logic.
Key differences
The LFMXO5-100T has about 9% more logic capacity (80K vs 73.6K LUT4 equivalents).
They use different logic architectures: the LFMXO5-100T is built from LUT4 and the XCSU100P from LUT6, so the raw LUT counts (80K vs 46K) are not directly comparable.
For arithmetic, the LFMXO5-100T has 156 18×18 multipliers against 144 DSP slices on the XCSU100P.
The LFMXO5-100T has more on-chip memory (7.2 Mb vs 5.1 Mb).
Both have transceivers: 2 at up to 0 Gb/s on the LFMXO5-100T and 4 at up to 16.3 Gb/s on the XCSU100P.
Configuration memory: internal flash on the LFMXO5-100T, sram on the XCSU100P.
The LFMXO5-100T is designed with Lattice Radiant and the XCSU100P with AMD Vivado.
Full specifications
See the complete spec sheets with packages and grades: LFMXO5-100T (MachXO5-NX) and XCSU100P (Spartan UltraScale+).