XCSU100P

AMDSpartan UltraScale+

The XCSU100P is a Spartan UltraScale+ FPGA from AMD, built on a 16 nm process. It provides 46,000 LUT6 look-up tables (101,000 system logic cells), about 73,600 LUT4 equivalents, 92,000 flip-flops, 5.1 Mb of block RAM and 144 DSP slices. It offers up to 478 user I/O pins and 4 GTH transceivers at up to 16.3 Gb/s, with hard PCI Express Gen4 x4 blocks. It is available in 5 packages, from the CMVB529 (12 × 12 mm) to the SBVA1024 (27 × 27 mm). Temperature grades: extended, industrial. Designs are built with AMD Vivado.

73.6KLUT4-equivalent

46KLUTs (LUT6)

144DSP slices

5.1 MbBlock RAM

478Max. user I/O

4Transceivers (16.3 Gb/s)

Specifications

Vendor	AMD
Family	Spartan UltraScale+
Series	UltraScale+
Process	16 nm
Configuration memory	SRAM
LUT4-equivalent capacity	73,600
Look-up tables (LUT6)	46,000
System logic cells	101,000
Flip-flops	92,000
Distributed RAM	901 Kb
Block RAM	5.1 Mb (144 × 36 Kb)
DSP (DSP slice)	144
Clock management tiles	5

Max. user I/O	478
HD I/O	294
HP I/O	52
XP5 I/O	132
GTH transceivers	4 × 16.3 Gb/s
PCI Express	Gen4 x4
Analog / monitor	System Monitor
Design tool	AMD Vivado

Packages

Package	Size (mm)	Pitch (mm)	User I/O	Transceivers
CMVB529	12 × 12	0.5	284	4
SBVC529	19 × 19	0.8	304	—
SBVF784	23 × 23	0.8	408	4
SBVG784	23 × 23	0.8	310	4
SBVA1024	27 × 27	0.8	478	4

Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).

Speed and temperature grades

Temperature grade	Junction range	Speed grades
Extended (E)	0 to 100 °C	-1, -2
Industrial (I)	−40 to 100 °C	-1, -2, -1L

Alternatives to the XCSU100P

Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.

Device	LUT4-eq.	Vendor logic	DSP	Block RAM	Max I/O	Transceivers	PCIe
LFE5UM-85Lattice ECP5	84K 84K LUT4	—	156	3.7 Mb	365	4 SERDES 3.2 Gb/s	—
LFE5UM5G-85Lattice ECP5	84K 84K LUT4	—	156	3.7 Mb	365	4 SERDES 5 Gb/s	—
5CGXC5Altera Cyclone V	58.2K 29.1K ALMs	77K LE	150	4.4 Mb	336	6 XCVR 3.125 Gb/s	Gen1
5CGTD5Altera Cyclone V	58.2K 29.1K ALMs	77K LE	150	4.4 Mb	336	6 XCVR 6.144 Gb/s	Gen2
LFMXO5-100TLattice MachXO5-NX	80K 80K LUT4	96K LC	156	3.7 Mb	297	2 SERDES	Gen2
LFCPNX-100Lattice CertusPro-NX	80K 80K LUT4	96K LC	156	3.7 Mb	305	8 SERDES 10.3125 Gb/s	Gen3

Compare side by side: XCSU100P vs LFE5UM-85, XCSU100P vs LFE5UM5G-85, XCSU100P vs 5CGXC5, XCSU100P vs LFMXO5-100T.

XCSU100P quick facts

How many LUTs does the XCSU100P have?

The XCSU100P has 46,000 LUT6 look-up tables, about 73,600 LUT4 equivalents (101,000 system logic cells as published by AMD).

How many DSP blocks does the XCSU100P have?

The XCSU100P has 144 DSP slices and 5.1 Mb of block RAM.

Does the XCSU100P have transceivers?

Yes, 4 GTH transceivers at up to 16.3 Gb/s.

What are the alternatives to the XCSU100P?

Devices of similar size in other families include LFE5UM-85 (Lattice ECP5), LFE5UM5G-85 (Lattice ECP5), 5CGXC5 (Altera Cyclone V).

Which software is used to design with the XCSU100P?

Designs for the XCSU100P are built with AMD Vivado.

Other Spartan UltraScale+ devices

Device	LUT4-eq.	Vendor logic	DSP	Block RAM	Max I/O	Transceivers	PCIe
XCSU10P	8K 5K LUT6	11K SLC	24	1.7 Mb	304	—	—
XCSU25P	16K 10K LUT6	22K SLC	36	1.7 Mb	304	—	—
XCSU35P	25.6K 16K LUT6	36K SLC	48	1.7 Mb	304	—	—
XCSU45P	38.4K 24K LUT6	53K SLC	96	2.5 Mb	262	4 GTH 16.3 Gb/s	Gen4
XCSU60P	48K 30K LUT6	66K SLC	144	3.4 Mb	262	4 GTH 16.3 Gb/s	Gen4
XCSU65P	48K 30K LUT6	66K SLC	144	3.8 Mb	478	4 GTH 16.3 Gb/s	Gen4
XCSU100P	73.6K 46K LUT6	101K SLC	144	5.1 Mb	478	4 GTH 16.3 Gb/s	Gen4
XCSU150P	101K 63K LUT6	138K SLC	384	5.9 Mb	572	8 GTH 16.3 Gb/s	Gen4
XCSU200P	160K 100K LUT6	219K SLC	384	6.8 Mb	572	8 GTH 16.3 Gb/s	Gen4

Source: AMD UltraScale+ FPGAs Product Selection Guide, XMP103 (v2.8). Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.