FPGA & adaptive SoC databook · online editionRev. 2026.10

LFMXO5-100T

LatticeMachXO5-NX

The LFMXO5-100T is a MachXO5-NX FPGA from Lattice, built on a 28 nm process. It provides 80,000 LUT4 look-up tables (96,000 logic cells), 3.7 Mb of block RAM plus 3.5 Mb of LRAM and 156 18×18 multipliers. It offers up to 297 user I/O pins and 2 SERDES transceivers, with hard PCI Express Gen2 blocks. It comes in a single package, the BBG400 (17 × 17 mm). Designs are built with Lattice Radiant.

80KLUT4-equivalent
80KLUTs (LUT4)
15618×18 multipliers
3.5 MbLRAM
3.7 MbBlock RAM
297Max. user I/O
2Transceivers

Specifications

VendorLattice
FamilyMachXO5-NX
SeriesNexus
Process28 nm
Configuration memoryInternal flash
LUT4-equivalent capacity80,000
Look-up tables (LUT4)80,000
   LUT noteDerived from logic cells ÷ 1.2 (Lattice definition for Nexus devices)
Logic cells96,000
Distributed RAM639 Kb
Block RAM3.7 Mb (208 × 18 Kb)
LRAM3.5 Mb
User flash memory79,872 Kb
DSP (18×18 multiplier)156
Max. user I/O297
SERDES transceivers2 (rate not published)
PCI Express Gen2
Analog / monitorSAR ADC
Design toolLattice Radiant

Packages

PackageSize (mm)Pitch (mm)User I/OTransceivers
BBG40017 × 170.82972

Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).

Alternatives to the LFMXO5-100T

Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.

DeviceLUT4-eq.Vendor logicDSPBlock RAMMax I/OTransceiversPCIe
XCSU100PAMD Spartan UltraScale+73.6K 46K LUT6101K SLC1445.1 Mb4784 GTH 16.3 Gb/sGen4
LFE5UM-85Lattice ECP584K 84K LUT4—1563.7 Mb3654 SERDES 3.2 Gb/s—
LFE5UM5G-85Lattice ECP584K 84K LUT4—1563.7 Mb3654 SERDES 5 Gb/s—
LFCPNX-100Lattice CertusPro-NX80K 80K LUT496K LC1563.7 Mb3058 SERDES 10.3125 Gb/sGen3
Certus-N2 CT10Lattice Certus-N261K 61K LUT4100K LC2405.5 Mb1964 SERDES 16 Gb/s—
5CGXC5Altera Cyclone V58.2K 29.1K ALMs77K LE1504.4 Mb3366 XCVR 3.125 Gb/sGen1

Compare side by side: LFMXO5-100T vs XCSU100P, LFMXO5-100T vs LFE5UM-85, LFMXO5-100T vs LFE5UM5G-85.

LFMXO5-100T quick facts

How many LUTs does the LFMXO5-100T have?

The LFMXO5-100T has 80,000 LUT4 look-up tables, about 80,000 LUT4 equivalents (96,000 logic cells as published by Lattice).

How many DSP blocks does the LFMXO5-100T have?

The LFMXO5-100T has 156 18×18 multipliers and 3.7 Mb of block RAM plus 3.5 Mb of LRAM.

Does the LFMXO5-100T have transceivers?

Yes, 2 SERDES transceivers.

What are the alternatives to the LFMXO5-100T?

Devices of similar size in other families include XCSU100P (AMD Spartan UltraScale+), LFE5UM-85 (Lattice ECP5), LFE5UM5G-85 (Lattice ECP5).

Which software is used to design with the LFMXO5-100T?

Designs for the LFMXO5-100T are built with Lattice Radiant.

Other MachXO5-NX devices

DeviceLUT4-eq.Vendor logicDSPBlock RAMMax I/OTransceiversPCIe
LFMXO5-15D11.7K 11.7K LUT414K LC160.3 Mb305——
LFMXO5-20TD16.7K 16.7K LUT420K LC480.7 Mb3681 SERDESGen2
LFMXO5-2522.5K 22.5K LUT427K LC201.4 Mb305——
LFMXO5-30TD25K 25K LUT430K LC480.8 Mb3681 SERDESGen2
LFMXO5-35T29.2K 29.2K LUT435K LC481.9 Mb3711 SERDESGen2
LFMXO5-55TDQ31.7K 31.7K LUT438K LC930.3 Mb2972 SERDESGen2
LFMXO5-55T44.2K 44.2K LUT453K LC1462.9 Mb2972 SERDESGen2
LFMXO5-55TD44.2K 44.2K LUT453K LC1102.9 Mb2972 SERDESGen2
LFMXO5-65T54.2K 54.2K LUT465K LC1282.2 Mb3711 SERDESGen2
LFMXO5-100T80K 80K LUT496K LC1563.7 Mb2972 SERDESGen2

Source: Lattice MachXO5-NX product page, Family Table, retrieved 2026-10-24. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.