FPGA & adaptive SoC databook · online editionRev. 2026.10

LFMXO5-55T vs XCSU60P

A comparison of the Lattice MachXO5-NX LFMXO5-55T and the AMD Spartan UltraScale+ XCSU60P using the data from both vendors' selection guides.

Side-by-side specifications

LFMXO5-55TXCSU60P
Vendor / familyLattice MachXO5-NXAMD Spartan UltraScale+
Logic (LUT4-equivalent)44,16748,000
LUTs as published44,167 LUT430,000 LUT6
Vendor logic figure53,000 LC66,000 SLC
DSP146 18×18 multipliers144 DSP slices
Block RAM2.9 Mb3.4 Mb
Large RAM2.5 Mb—
Max. user I/O297262
Transceivers2 × SERDES4 × GTH 16.3 Gb/s
Hard PCI ExpressGen2Gen4 x4
Hard processorNoneNone
Process28 nm16 nm
Configuration memoryInternal flashSRAM
Packages13
Design toolLattice RadiantAMD Vivado

Highlighted values are higher. Logic is compared in LUT4 equivalents; see how FPGA vendors count logic.

Key differences

The XCSU60P has about 9% more logic capacity (48K vs 44.2K LUT4 equivalents).

They use different logic architectures: the LFMXO5-55T is built from LUT4 and the XCSU60P from LUT6, so the raw LUT counts (44.2K vs 30K) are not directly comparable.

For arithmetic, the LFMXO5-55T has 146 18×18 multipliers against 144 DSP slices on the XCSU60P.

The LFMXO5-55T has more on-chip memory (5.4 Mb vs 3.4 Mb).

Both have transceivers: 2 at up to 0 Gb/s on the LFMXO5-55T and 4 at up to 16.3 Gb/s on the XCSU60P.

Configuration memory: internal flash on the LFMXO5-55T, sram on the XCSU60P.

The LFMXO5-55T is designed with Lattice Radiant and the XCSU60P with AMD Vivado.

Full specifications

See the complete spec sheets with packages and grades: LFMXO5-55T (MachXO5-NX) and XCSU60P (Spartan UltraScale+).