XCSU60P

AMDSpartan UltraScale+

The XCSU60P is a Spartan UltraScale+ FPGA from AMD, built on a 16 nm process. It provides 30,000 LUT6 look-up tables (66,000 system logic cells), about 48,000 LUT4 equivalents, 60,000 flip-flops, 3.4 Mb of block RAM and 144 DSP slices. It offers up to 262 user I/O pins and 4 GTH transceivers at up to 16.3 Gb/s, with hard PCI Express Gen4 x4 blocks. It is available in 3 packages, from the CMVE529 (12 × 12 mm) to the SBVB625 (21 × 21 mm). Temperature grades: extended, industrial. Designs are built with AMD Vivado.

48KLUT4-equivalent

30KLUTs (LUT6)

144DSP slices

3.4 MbBlock RAM

262Max. user I/O

4Transceivers (16.3 Gb/s)

Specifications

Vendor	AMD
Family	Spartan UltraScale+
Series	UltraScale+
Process	16 nm
Configuration memory	SRAM
LUT4-equivalent capacity	48,000
Look-up tables (LUT6)	30,000
System logic cells	66,000
Flip-flops	60,000
Distributed RAM	676 Kb
Block RAM	3.4 Mb (96 × 36 Kb)
DSP (DSP slice)	144
Clock management tiles	3

Max. user I/O	262
HD I/O	210
HP I/O	52
GTH transceivers	4 × 16.3 Gb/s
PCI Express	Gen4 x4
Analog / monitor	System Monitor
Design tool	AMD Vivado

Packages

Package	Size (mm)	Pitch (mm)	User I/O	Transceivers
CMVE529	12 × 12	0.5	240	4
SBVD529	19 × 19	0.8	262	4
SBVB625	21 × 21	0.8	240	—

Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).

Speed and temperature grades

Temperature grade	Junction range	Speed grades
Extended (E)	0 to 100 °C	-1, -2
Industrial (I)	−40 to 100 °C	-1, -2, -1L

Alternatives to the XCSU60P

Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.

Device	LUT4-eq.	Vendor logic	DSP	Block RAM	Max I/O	Transceivers	PCIe
MPF050TMicrochip PolarFire	48K 48K LUT4	48K LE	150	3.1 Mb	188	4 SERDES 12.7 Gb/s	Gen2
XC7A50TAMD Artix-7	52.2K 32.6K LUT6	52.2K LC	120	2.6 Mb	250	4 GTP 6.6 Gb/s	Gen2
Certus-N2 CT06Lattice Certus-N2	40K 40K LUT4	65K LC	120	4 Mb	196	4 SERDES 16 Gb/s	—
5CGXC5Altera Cyclone V	58.2K 29.1K ALMs	77K LE	150	4.4 Mb	336	6 XCVR 3.125 Gb/s	Gen1
5CGTD5Altera Cyclone V	58.2K 29.1K ALMs	77K LE	150	4.4 Mb	336	6 XCVR 6.144 Gb/s	Gen2
LFCPNX-50Lattice CertusPro-NX	43.3K 43.3K LUT4	52K LC	96	1.7 Mb	269	4 SERDES 10.3125 Gb/s	Gen3

Compare side by side: XCSU60P vs MPF050T, XCSU60P vs XC7A50T, XCSU60P vs Certus-N2 CT06, XCSU60P vs 5CGXC5, XCSU60P vs 5CGTD5.

XCSU60P quick facts

How many LUTs does the XCSU60P have?

The XCSU60P has 30,000 LUT6 look-up tables, about 48,000 LUT4 equivalents (66,000 system logic cells as published by AMD).

How many DSP blocks does the XCSU60P have?

The XCSU60P has 144 DSP slices and 3.4 Mb of block RAM.

Does the XCSU60P have transceivers?

Yes, 4 GTH transceivers at up to 16.3 Gb/s.

What are the alternatives to the XCSU60P?

Devices of similar size in other families include MPF050T (Microchip PolarFire), XC7A50T (AMD Artix-7), Certus-N2 CT06 (Lattice Certus-N2).

Which software is used to design with the XCSU60P?

Designs for the XCSU60P are built with AMD Vivado.

Other Spartan UltraScale+ devices

Device	LUT4-eq.	Vendor logic	DSP	Block RAM	Max I/O	Transceivers	PCIe
XCSU10P	8K 5K LUT6	11K SLC	24	1.7 Mb	304	—	—
XCSU25P	16K 10K LUT6	22K SLC	36	1.7 Mb	304	—	—
XCSU35P	25.6K 16K LUT6	36K SLC	48	1.7 Mb	304	—	—
XCSU45P	38.4K 24K LUT6	53K SLC	96	2.5 Mb	262	4 GTH 16.3 Gb/s	Gen4
XCSU60P	48K 30K LUT6	66K SLC	144	3.4 Mb	262	4 GTH 16.3 Gb/s	Gen4
XCSU65P	48K 30K LUT6	66K SLC	144	3.8 Mb	478	4 GTH 16.3 Gb/s	Gen4
XCSU100P	73.6K 46K LUT6	101K SLC	144	5.1 Mb	478	4 GTH 16.3 Gb/s	Gen4
XCSU150P	101K 63K LUT6	138K SLC	384	5.9 Mb	572	8 GTH 16.3 Gb/s	Gen4
XCSU200P	160K 100K LUT6	219K SLC	384	6.8 Mb	572	8 GTH 16.3 Gb/s	Gen4

Source: AMD UltraScale+ FPGAs Product Selection Guide, XMP103 (v2.8). Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.