LFMXO5-55T

LatticeMachXO5-NX

The LFMXO5-55T is a MachXO5-NX FPGA from Lattice, built on a 28 nm process. It provides 44,167 LUT4 look-up tables (53,000 logic cells), 2.9 Mb of block RAM plus 2.5 Mb of LRAM and 146 18×18 multipliers. It offers up to 297 user I/O pins and 2 SERDES transceivers, with hard PCI Express Gen2 blocks. It comes in a single package, the BBG400 (17 × 17 mm). Designs are built with Lattice Radiant.

44.2KLUT4-equivalent

44.2KLUTs (LUT4)

14618×18 multipliers

2.5 MbLRAM

2.9 MbBlock RAM

297Max. user I/O

2Transceivers

Specifications

Vendor	Lattice
Family	MachXO5-NX
Series	Nexus
Process	28 nm
Configuration memory	Internal flash
LUT4-equivalent capacity	44,167
Look-up tables (LUT4)	44,167
LUT note	Derived from logic cells ÷ 1.2 (Lattice definition for Nexus devices)
Logic cells	53,000
Distributed RAM	320 Kb
Block RAM	2.9 Mb (166 × 18 Kb)
LRAM	2.5 Mb
User flash memory	79,872 Kb
DSP (18×18 multiplier)	146

Max. user I/O	297
SERDES transceivers	2 (rate not published)
PCI Express	Gen2
Analog / monitor	SAR ADC
Design tool	Lattice Radiant

Packages

Package	Size (mm)	Pitch (mm)	User I/O	Transceivers
BBG400	17 × 17	0.8	297	2

Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).

Alternatives to the LFMXO5-55T

Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.

Device	LUT4-eq.	Vendor logic	DSP	Block RAM	Max I/O	Transceivers	PCIe
XCSU60PAMD Spartan UltraScale+	48K 30K LUT6	66K SLC	144	3.4 Mb	262	4 GTH 16.3 Gb/s	Gen4
Certus-N2 CT06Lattice Certus-N2	40K 40K LUT4	65K LC	120	4 Mb	196	4 SERDES 16 Gb/s	—
XCSU65PAMD Spartan UltraScale+	48K 30K LUT6	66K SLC	144	3.8 Mb	478	4 GTH 16.3 Gb/s	Gen4
LFD2NX-65Lattice Certus-NX	54.2K 54.2K LUT4	65K LC	128	2.2 Mb	371	1 SERDES 5 Gb/s	Gen2
LFCPNX-50Lattice CertusPro-NX	43.3K 43.3K LUT4	52K LC	96	1.7 Mb	269	4 SERDES 10.3125 Gb/s	Gen3
5CGXC5Altera Cyclone V	58.2K 29.1K ALMs	77K LE	150	4.4 Mb	336	6 XCVR 3.125 Gb/s	Gen1

Compare side by side: LFMXO5-55T vs XCSU60P, LFMXO5-55T vs Certus-N2 CT06, LFMXO5-55T vs XCSU65P.

LFMXO5-55T quick facts

How many LUTs does the LFMXO5-55T have?

The LFMXO5-55T has 44,167 LUT4 look-up tables, about 44,167 LUT4 equivalents (53,000 logic cells as published by Lattice).

How many DSP blocks does the LFMXO5-55T have?

The LFMXO5-55T has 146 18×18 multipliers and 2.9 Mb of block RAM plus 2.5 Mb of LRAM.

Does the LFMXO5-55T have transceivers?

Yes, 2 SERDES transceivers.

What are the alternatives to the LFMXO5-55T?

Devices of similar size in other families include XCSU60P (AMD Spartan UltraScale+), Certus-N2 CT06 (Lattice Certus-N2), XCSU65P (AMD Spartan UltraScale+).

Which software is used to design with the LFMXO5-55T?

Designs for the LFMXO5-55T are built with Lattice Radiant.

Other MachXO5-NX devices

Device	LUT4-eq.	Vendor logic	DSP	Block RAM	Max I/O	Transceivers	PCIe
LFMXO5-15D	11.7K 11.7K LUT4	14K LC	16	0.3 Mb	305	—	—
LFMXO5-20TD	16.7K 16.7K LUT4	20K LC	48	0.7 Mb	368	1 SERDES	Gen2
LFMXO5-25	22.5K 22.5K LUT4	27K LC	20	1.4 Mb	305	—	—
LFMXO5-30TD	25K 25K LUT4	30K LC	48	0.8 Mb	368	1 SERDES	Gen2
LFMXO5-35T	29.2K 29.2K LUT4	35K LC	48	1.9 Mb	371	1 SERDES	Gen2
LFMXO5-55TDQ	31.7K 31.7K LUT4	38K LC	93	0.3 Mb	297	2 SERDES	Gen2
LFMXO5-55T	44.2K 44.2K LUT4	53K LC	146	2.9 Mb	297	2 SERDES	Gen2
LFMXO5-55TD	44.2K 44.2K LUT4	53K LC	110	2.9 Mb	297	2 SERDES	Gen2
LFMXO5-65T	54.2K 54.2K LUT4	65K LC	128	2.2 Mb	371	1 SERDES	Gen2
LFMXO5-100T	80K 80K LUT4	96K LC	156	3.7 Mb	297	2 SERDES	Gen2

Source: Lattice MachXO5-NX product page, Family Table, retrieved 2026-10-24. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.