FPGA & adaptive SoC databook · online editionRev. 2026.10

MX 1650 E-tile vs TX 1650

A comparison of the Altera Stratix 10 MX MX 1650 E-tile and the Altera Stratix 10 TX TX 1650 using the data from both vendors' selection guides.

Side-by-side specifications

MX 1650 E-tileTX 1650
Vendor / familyAltera Stratix 10 MXAltera Stratix 10 TX
LUTs as published569,200 ALMs569,200 ALMs
LUT typeadaptive logic module: fracturable 8-input LUT (one 6-input or two independent 4-input functions)adaptive logic module: fracturable 8-input LUT (one 6-input or two independent 4-input functions)
LUT4 equivalent (approx.)≈1,138,400≈1,138,400
CoreScore (SERV cores)——
Vendor logic figure1,679,000 LE1,679,000 LE
DSP3,326 variable-precision DSP blocks3,326 variable-precision DSP blocks
Block RAM120 Mb120 Mb
Large RAM——
Max. user I/O584440
Transceivers72 × GXE 57.8 Gb/s, 16 × GXT 28.3 Gb/s, 8 × GX 17.4 Gb/s72 × GXE 57.8 Gb/s, 16 × GXT 28.3 Gb/s, 8 × GX 17.4 Gb/s
Hard PCI ExpressGen3 x16Gen3 x16
Hard processorNoneNone
Process14 nm14 nm
Configuration memorySRAMSRAM
Packages11
Design toolAltera Quartus PrimeAltera Quartus Prime

Highlighted values are higher. LUT counts are shown as published; the LUT4 equivalent is an approximation to compare different LUT types, see how FPGA vendors count logic. Add up to two more devices to this comparison.

Key differences

Both devices offer similar logic capacity: 1138K and 1138K LUT4 equivalents.

The MX 1650 E-tile is designed with Altera Quartus Prime and the TX 1650 with Altera Quartus Prime.

Full specifications

See the complete spec sheets with packages and grades: MX 1650 E-tile (Stratix 10 MX) and TX 1650 (Stratix 10 TX).