FPGA & adaptive SoC databook · online editionRev. 2026.10

MX 1650 E-tile vs XCVU190

A comparison of the Altera Stratix 10 MX MX 1650 E-tile and the AMD Virtex UltraScale XCVU190 using the data from both vendors' selection guides.

Side-by-side specifications

MX 1650 E-tileXCVU190
Vendor / familyAltera Stratix 10 MXAMD Virtex UltraScale
LUTs as published569,200 ALMs1,074,240 LUT6
LUT typeadaptive logic module: fracturable 8-input LUT (one 6-input or two independent 4-input functions)6-input look-up table, fracturable into two LUT5 with shared inputs
LUT4 equivalent (approx.)≈1,138,400≈1,718,784
CoreScore (SERV cores)——
Vendor logic figure1,679,000 LE2,350,000 SLC
DSP3,326 variable-precision DSP blocks1,800 DSP slices
Block RAM120 Mb132.9 Mb
Large RAM——
Max. user I/O584702
Transceivers72 × GXE 57.8 Gb/s, 16 × GXT 28.3 Gb/s, 8 × GX 17.4 Gb/s60 × GTH 16.3 Gb/s, 60 × GTY 30.5 Gb/s
Hard PCI ExpressGen3 x16Gen3
Hard processorNoneNone
Process14 nm20 nm
Configuration memorySRAMSRAM
Packages13
Design toolAltera Quartus PrimeAMD Vivado

Highlighted values are higher. LUT counts are shown as published; the LUT4 equivalent is an approximation to compare different LUT types, see how FPGA vendors count logic. Add up to two more devices to this comparison.

Key differences

The XCVU190 has about 51% more logic capacity (1719K vs 1138K LUT4 equivalents).

They use different logic architectures: the MX 1650 E-tile is built from ALMs and the XCVU190 from LUT6, so the raw LUT counts (569K vs 1074K) are not directly comparable.

For arithmetic, the MX 1650 E-tile has 3,326 variable-precision DSP blocks against 1,800 DSP slices on the XCVU190.

Both have transceivers: 96 at up to 57.8 Gb/s on the MX 1650 E-tile and 120 at up to 30.5 Gb/s on the XCVU190.

The MX 1650 E-tile is designed with Altera Quartus Prime and the XCVU190 with AMD Vivado.

Full specifications

See the complete spec sheets with packages and grades: MX 1650 E-tile (Stratix 10 MX) and XCVU190 (Virtex UltraScale).