FPGA & adaptive SoC databook · online editionRev. 2026.10

Lattice LatticeECP3 FPGAs

The Lattice LatticeECP3 family has 5 devices, built on the 65 nm process, ranging from 17K LUT4 to 149K LUT4 and from 24 to 320 18×18 multipliers. It uses LUT4 look-up tables. Transceivers: SERDES, up to 3.2 Gb/s.

DeviceLUTsVendor logicDSPBlock RAMMax I/OTransceiversPCIeCoreScore
LFE3-17EA17,000 LUT4—240.7 Mb2224 SERDES 3.2 Gb/s——
LFE3-35EA33,000 LUT4—641.3 Mb3104 SERDES 3.2 Gb/s——
LFE3-70EA67,000 LUT4—1284.3 Mb49012 SERDES 3.2 Gb/s——
LFE3-95EA92,000 LUT4—1284.3 Mb49012 SERDES 3.2 Gb/s——
LFE3-150EA149,000 LUT4—3206.7 Mb58616 SERDES 3.2 Gb/s——

Source: Lattice LatticeECP3 product page, Family Table, retrieved 2026-10-26.