AGI 041

AlteraAgilex 7 I-Series

The AGI 041 is an Agilex 7 I-Series FPGA from Altera, built on the Intel 7 process. It provides 1,356,160 adaptive logic modules (ALMs) (4,000,672 logic elements (LEs)), about 2,712,320 LUT4 equivalents, 5,424,640 flip-flops, 335 Mb of block RAM, with no hard multipliers. Versions with the optional hard processor system include four Arm Cortex-A53 cores. The programmable logic offers up to 744 user I/O pins and 64 XCVR transceivers at up to 116 Gb/s. It is available in 3 packages, from the R31B (56 × 45 mm) to the R31E (56 × 45 mm). Designs are built with Altera Quartus Prime.

2712KLUT4-equivalent

1356KALMs

—variable-precision DSP blocks

335 MbBlock RAM

744Max. user I/O

64Transceivers (116 Gb/s)

4× A53Hard processor

Specifications

Vendor	Altera
Family	Agilex 7 I-Series
Series	Agilex
Process	Intel 7
Configuration memory	SRAM
LUT4-equivalent capacity	2,712,320
Adaptive logic modules (ALMs)	1,356,160
LUT note	Adaptive logic modules (ALMs): fracturable 8-input LUTs; each ALM can implement two 4-input functions
Logic elements (LEs)	4,000,672
Flip-flops	5,424,640
Distributed RAM	43,008 Kb
Block RAM	335 Mb (17136 × 20 Kb)
DSP (variable-precision DSP block)	None

Max. user I/O	744
XCVR transceivers	64 × 116 Gb/s
PCI Express (PL)	None
Analog / monitor	None
Hard processor	4× Arm Cortex-A53 (optional, HPS variants)
Design tool	Altera Quartus Prime

Packages

Package	Size (mm)	Pitch (mm)	User I/O	PS I/O	Transceivers
R31B	56 × 45	0.92	732	48	64
R29A	56 × 45	—	720	48	16
R31E	56 × 45	0.92	744	48	32

Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).

Alternatives to the AGI 041

Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.

Device	LUT4-eq.	Vendor logic	DSP	Block RAM	Max I/O	Transceivers	PCIe
GW2AN-55Gowin Arora II	54.7K 54.7K LUT4	—	—	2.5 Mb	608	—	—
XCVE2202AMD Versal AI Edge	168K 105K LUT6	230K SLC	324	3.8 Mb	238	8 GTYP 32.75 Gb/s	Gen4
XCVE2302AMD Versal AI Edge	240K 150K LUT6	329K SLC	464	5.4 Mb	238	8 GTYP 32.75 Gb/s	Gen4
XCVM1102AMD Versal Prime	240K 150K LUT6	329K SLC	464	5 Mb	238	8 GTYP 32.75 Gb/s	Gen4
10AX022Altera Arria 10	167K 83.7K ALMs	288K LE	192	11.5 Mb	288	12 XCVR 17.4 Gb/s	Gen3
10CX220Altera Cyclone 10 GX	161K 80.3K ALMs	220K LE	192	11.5 Mb	284	12 XCVR 12.5 Gb/s	Gen2

Compare side by side: AGI 041 vs GW2AN-55, AGI 041 vs XCVE2202, AGI 041 vs XCVE2302.

AGI 041 quick facts

How many LUTs does the AGI 041 have?

The AGI 041 has 1,356,160 adaptive logic modules (ALMs), about 2,712,320 LUT4 equivalents (4,000,672 logic elements (les) as published by Altera).

How many DSP blocks does the AGI 041 have?

The AGI 041 has no variable-precision DSP blocks and 335 Mb of block RAM.

Does the AGI 041 have transceivers?

Yes, 64 XCVR transceivers at up to 116 Gb/s.

Does the AGI 041 have a processor?

Yes. Variants with the optional hard processor system include a 4× Arm Cortex-A53 processor.

What are the alternatives to the AGI 041?

Devices of similar size in other families include GW2AN-55 (Gowin Arora II), XCVE2202 (AMD Versal AI Edge), XCVE2302 (AMD Versal AI Edge).

Which software is used to design with the AGI 041?

Designs for the AGI 041 are built with Altera Quartus Prime.

Other Agilex 7 I-Series devices

Device	LUT4-eq.	Vendor logic	DSP	Block RAM	Max I/O	Transceivers	PCIe
AGI 019	1301K 650K ALMs	1919K LE	1,354	166 Mb	480	64 XCVR 116 Gb/s	—
AGI 022	1497K 748K ALMs	2208K LE	6,250	212 Mb	720	64 XCVR 116 Gb/s	—
AGI 023	1565K 782K ALMs	2308K LE	1,640	204 Mb	480	64 XCVR 116 Gb/s	—
AGI 027	1826K 913K ALMs	2693K LE	8,528	259 Mb	720	64 XCVR 116 Gb/s	—
AGI 035	2400K 1200K ALMs	3540K LE	9,594	292 Mb	576	96 XCVR 116 Gb/s	—
AGI 041	2712K 1356K ALMs	4001K LE	—	335 Mb	744	64 XCVR 116 Gb/s	—
AGI 040	2744K 1372K ALMs	4047K LE	12,792	389 Mb	576	96 XCVR 116 Gb/s	—

Source: Altera Agilex 7 FPGAs and SoCs I-Series Product Table, 2026.08.14. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.