AGI 040

AlteraAgilex 7 I-Series

The AGI 040 is an Agilex 7 I-Series FPGA from Altera, built on the Intel 7 process. It provides 1,372,000 adaptive logic modules (ALMs) (4,047,400 logic elements (LEs)), about 2,744,000 LUT4 equivalents, 5,488,000 flip-flops, 389 Mb of block RAM and 12,792 variable-precision DSP blocks. Versions with the optional hard processor system include four Arm Cortex-A53 cores. The programmable logic offers up to 576 user I/O pins and 96 XCVR transceivers at up to 116 Gb/s. It comes in a single package, the R39A (56 × 56 mm). Designs are built with Altera Quartus Prime.

2744KLUT4-equivalent

1372KALMs

12,792variable-precision DSP blocks

389 MbBlock RAM

576Max. user I/O

96Transceivers (116 Gb/s)

4× A53Hard processor

Specifications

Vendor	Altera
Family	Agilex 7 I-Series
Series	Agilex
Process	Intel 7
Configuration memory	SRAM
LUT4-equivalent capacity	2,744,000
Adaptive logic modules (ALMs)	1,372,000
LUT note	Adaptive logic modules (ALMs): fracturable 8-input LUTs; each ALM can implement two 4-input functions
Logic elements (LEs)	4,047,400
Flip-flops	5,488,000
Distributed RAM	43,008 Kb
Block RAM	389 Mb (19908 × 20 Kb)
DSP (variable-precision DSP block)	12,792

Max. user I/O	576
XCVR transceivers	96 × 116 Gb/s
PCI Express (PL)	None
Analog / monitor	None
Hard processor	4× Arm Cortex-A53 (optional, HPS variants)
Design tool	Altera Quartus Prime

Packages

Package	Size (mm)	Pitch (mm)	User I/O	Transceivers
R39A	56 × 56	0.92	576	96

Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).

Alternatives to the AGI 040

Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.

Device	LUT4-eq.	Vendor logic	DSP	Block RAM	Max I/O	Transceivers	PCIe
AGF 027Altera Agilex 7 F-Series	1826K 913K ALMs	2693K LE	8,528	259 Mb	744	64 XCVR 58 Gb/s	—
AGM 039Altera Agilex 7 M-Series	2611K 1306K ALMs	3852K LE	12,300	370 Mb	768	16 XCVR 32 Gb/s	—
SX 2800Altera Stratix 10 GX/SX	1866K 933K ALMs	2753K LE	5,760	229 Mb	1,160	96 XCVR/XCVR 28.3 Gb/s	Gen3
AGM 032Altera Agilex 7 M-Series	2200K 1100K ALMs	3245K LE	9,375	311 Mb	768	16 XCVR 32 Gb/s	—
AGF 022Altera Agilex 7 F-Series	1497K 748K ALMs	2208K LE	6,250	212 Mb	744	64 XCVR 58 Gb/s	—
SX 2500Altera Stratix 10 GX/SX	1642K 821K ALMs	2422K LE	5,011	195 Mb	1,160	96 XCVR/XCVR 28.3 Gb/s	Gen3

Compare side by side: AGI 040 vs AGF 027, AGI 040 vs AGM 039, AGI 040 vs SX 2800.

AGI 040 quick facts

How many LUTs does the AGI 040 have?

The AGI 040 has 1,372,000 adaptive logic modules (ALMs), about 2,744,000 LUT4 equivalents (4,047,400 logic elements (les) as published by Altera).

How many DSP blocks does the AGI 040 have?

The AGI 040 has 12,792 variable-precision DSP blocks and 389 Mb of block RAM.

Does the AGI 040 have transceivers?

Yes, 96 XCVR transceivers at up to 116 Gb/s.

Does the AGI 040 have a processor?

Yes. Variants with the optional hard processor system include a 4× Arm Cortex-A53 processor.

What are the alternatives to the AGI 040?

Devices of similar size in other families include AGF 027 (Altera Agilex 7 F-Series), AGM 039 (Altera Agilex 7 M-Series), SX 2800 (Altera Stratix 10 GX/SX).

Which software is used to design with the AGI 040?

Designs for the AGI 040 are built with Altera Quartus Prime.

Other Agilex 7 I-Series devices

Device	LUT4-eq.	Vendor logic	DSP	Block RAM	Max I/O	Transceivers	PCIe
AGI 019	1301K 650K ALMs	1919K LE	1,354	166 Mb	480	64 XCVR 116 Gb/s	—
AGI 022	1497K 748K ALMs	2208K LE	6,250	212 Mb	720	64 XCVR 116 Gb/s	—
AGI 023	1565K 782K ALMs	2308K LE	1,640	204 Mb	480	64 XCVR 116 Gb/s	—
AGI 027	1826K 913K ALMs	2693K LE	8,528	259 Mb	720	64 XCVR 116 Gb/s	—
AGI 035	2400K 1200K ALMs	3540K LE	9,594	292 Mb	576	96 XCVR 116 Gb/s	—
AGI 041	2712K 1356K ALMs	4001K LE	—	335 Mb	744	64 XCVR 116 Gb/s	—
AGI 040	2744K 1372K ALMs	4047K LE	12,792	389 Mb	576	96 XCVR 116 Gb/s	—

Source: Altera Agilex 7 FPGAs and SoCs I-Series Product Table, 2026.08.14. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.