EP4CE115
AlteraCyclone IVThe EP4CE115 is a Cyclone IV FPGA from Altera, built on a 60 nm process. It provides 114,000 LUT4 look-up tables, 3.8 Mb of block RAM and 266 18×18 multipliers. It offers up to 528 user I/O pins. It is available in 2 packages, from the F484 (23 × 23 mm) to the F780 (29 × 29 mm). Designs are built with Altera Quartus Prime.
Specifications
| Vendor | Altera |
|---|---|
| Family | Cyclone IV |
| Series | Cyclone |
| Process | 60 nm |
| Configuration memory | SRAM |
| LUT4-equivalent capacity | 114,000 |
| Look-up tables (LUT4) | 114,000 |
| Logic elements (LEs) | 114,000 |
| Block RAM | 3.8 Mb (432 × 9 Kb) |
| DSP (18×18 multiplier) | 266 |
| Max. user I/O | 528 |
|---|---|
| Transceivers | None |
| PCI Express | None |
| Analog / monitor | None |
| Design tool | Altera Quartus Prime |
Packages
| Package | Size (mm) | Pitch (mm) | User I/O | Transceivers |
|---|---|---|---|---|
| F484 | 23 × 23 | 1.0 | 280 | — |
| F780 | 29 × 29 | 1.0 | 528 | — |
Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).
Alternatives to the EP4CE115
Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.
| Device | LUT4-eq. | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe |
|---|---|---|---|---|---|---|---|
| 10CL120Altera Cyclone 10 LP | 120K 120K LUT4 | 120K LE | 288 | 3.8 Mb | 525 | — | — |
| 10CL080Altera Cyclone 10 LP | 80K 80K LUT4 | 80K LE | 244 | 2.7 Mb | 423 | — | — |
| T85Efinix Trion | ≈84.1K 84.1K LEs | 84.1K LE | 240 | 4 Mb | 278 | — | — |
| T120Efinix Trion | ≈112K 112K LEs | 112K LE | 320 | 5.3 Mb | 278 | — | — |
| GW5A-138Gowin Arora V | 138K 138K LUT4 | — | 298 | 6 Mb | 312 | — | — |
| XC7S100AMD Spartan-7 | 102K 64K LUT6 | 102K LC | 160 | 4.2 Mb | 400 | — | — |
Compare side by side: EP4CE115 vs 10CL120, EP4CE115 vs 10CL080, EP4CE115 vs T85.
EP4CE115 quick facts
How many LUTs does the EP4CE115 have?
The EP4CE115 has 114,000 LUT4 look-up tables, about 114,000 LUT4 equivalents.
How many DSP blocks does the EP4CE115 have?
The EP4CE115 has 266 18×18 multipliers and 3.8 Mb of block RAM.
Does the EP4CE115 have transceivers?
No, the EP4CE115 has no multi-gigabit transceivers. Its user I/O supports up to 528 pins.
What are the alternatives to the EP4CE115?
Devices of similar size in other families include 10CL120 (Altera Cyclone 10 LP), 10CL080 (Altera Cyclone 10 LP), T85 (Efinix Trion).
Which software is used to design with the EP4CE115?
Designs for the EP4CE115 are built with Altera Quartus Prime.
Other Cyclone IV devices
| Device | LUT4-eq. | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe |
|---|---|---|---|---|---|---|---|
| EP4CE6 | 6K 6K LUT4 | 6K LE | 15 | 0.3 Mb | 179 | — | — |
| EP4CE10 | 10K 10K LUT4 | 10K LE | 23 | 0.4 Mb | 179 | — | — |
| EP4CGX15 | 14K 14K LUT4 | 14K LE | — | 0.5 Mb | 72 | 2 XCVR 3.125 Gb/s | Gen2 |
| EP4CE15 | 15K 15K LUT4 | 15K LE | 56 | 0.5 Mb | 343 | — | — |
| EP4CGX22 | 21K 21K LUT4 | 21K LE | 40 | 0.7 Mb | 150 | 4 XCVR 3.125 Gb/s | Gen2 |
| EP4CE22 | 22K 22K LUT4 | 22K LE | 66 | 0.6 Mb | 153 | — | — |
| EP4CGX30 | 29K 29K LUT4 | 29K LE | 80 | 1.1 Mb | 290 | 4 XCVR 3.125 Gb/s | Gen2 |
| EP4CE30 | 29K 29K LUT4 | 29K LE | 66 | 0.6 Mb | 532 | — | — |
| EP4CE40 | 40K 40K LUT4 | 40K LE | 116 | 1.1 Mb | 532 | — | — |
| EP4CGX50 | 50K 50K LUT4 | 50K LE | 140 | 2.4 Mb | 310 | 8 XCVR 3.125 Gb/s | Gen2 |
| EP4CE55 | 56K 56K LUT4 | 56K LE | 154 | 2.3 Mb | 374 | — | — |
| EP4CGX75 | 74K 74K LUT4 | 74K LE | 198 | 4.1 Mb | 310 | 8 XCVR 3.125 Gb/s | Gen2 |
| EP4CE75 | 75K 75K LUT4 | 75K LE | 200 | 2.7 Mb | 426 | — | — |
| EP4CGX110 | 109K 109K LUT4 | 109K LE | 280 | 5.8 Mb | 475 | 8 XCVR 3.125 Gb/s | Gen2 |
| EP4CE115 | 114K 114K LUT4 | 114K LE | 266 | 3.8 Mb | 528 | — | — |
| EP4CGX150 | 150K 150K LUT4 | 150K LE | 360 | 6.3 Mb | 475 | 8 XCVR 3.125 Gb/s | Gen2 |
Source: Altera Cyclone IV FPGA Product Table, 2025.09.24. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.