XCKU9P
AMDKintex UltraScale+The XCKU9P is a Kintex UltraScale+ FPGA from AMD, built on a 16 nm process. It provides 274,000 LUT6 look-up tables (600,000 system logic cells), about 438,400 LUT4 equivalents, 548,000 flip-flops, 32.1 Mb of block RAM and 2,520 DSP slices. It offers up to 304 user I/O pins and 28 GTH transceivers at up to 16.3 Gb/s. It comes in a single package, the FFVE900 (31 × 31 mm). Temperature grades: extended, industrial. Designs are built with AMD Vivado.
Specifications
| Vendor | AMD |
|---|---|
| Family | Kintex UltraScale+ |
| Series | UltraScale+ |
| Process | 16 nm |
| Configuration memory | SRAM |
| LUT4-equivalent capacity | 438,400 |
| Look-up tables (LUT6) | 274,000 |
| System logic cells | 600,000 |
| Flip-flops | 548,000 |
| Distributed RAM | 9,011 Kb |
| Block RAM | 32.1 Mb |
| DSP (DSP slice) | 2,520 |
| Clock management tiles | 4 |
| Max. user I/O | 304 |
|---|---|
| HD I/O | 96 |
| HP I/O | 208 |
| GTH transceivers | 28 × 16.3 Gb/s |
| PCI Express | None |
| Analog / monitor | System Monitor |
| Design tool | AMD Vivado |
Packages
| Package | Size (mm) | User I/O | Transceivers |
|---|---|---|---|
| FFVE900 | 31 × 31 | 304 | 28 |
Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).
Speed and temperature grades
| Temperature grade | Junction range | Speed grades |
|---|---|---|
| Extended (E) | 0 to 100 °C | -1, -2, -2L, -3 |
| Industrial (I) | −40 to 100 °C | -1, -1L, -2 |
Alternatives to the XCKU9P
Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.
| Device | LUT4-eq. | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe |
|---|---|---|---|---|---|---|---|
| XC7K480TAMD Kintex-7 | 478K 299K LUT6 | 478K LC | 1,920 | 33.6 Mb | 400 | 32 GTX 12.5 Gb/s | Gen2 |
| XC7K420TAMD Kintex-7 | 417K 261K LUT6 | 417K LC | 1,680 | 29.4 Mb | 400 | 32 GTX 12.5 Gb/s | Gen2 |
| LAV-AT-G70Lattice Avant-G | 397K 397K LUT4 | 637K LC | 1,800 | 35.6 Mb | 554 | 28 SERDES 12.5 Gb/s | — |
| LAV-AT-X70Lattice Avant-X | 397K 397K LUT4 | 637K LC | 1,800 | 35.6 Mb | 554 | 28 SERDES 25 Gb/s | — |
| XC7VX415TAMD Virtex-7 | 412K 258K LUT6 | 412K LC | 2,160 | 30.9 Mb | 600 | 48 GTH 13.1 Gb/s | Gen3 |
| XC2KU050PAMD Kintex UltraScale+ Gen 2 | 360K 225K LUT6 | 491K SLC | 1,872 | 17.7 Mb | 516 | 24 GTY 32.75 Gb/s | Gen4 |
Compare side by side: XCKU9P vs XC7K480T, XCKU9P vs XC7K420T, XCKU9P vs LAV-AT-G70.
XCKU9P quick facts
How many LUTs does the XCKU9P have?
The XCKU9P has 274,000 LUT6 look-up tables, about 438,400 LUT4 equivalents (600,000 system logic cells as published by AMD).
How many DSP blocks does the XCKU9P have?
The XCKU9P has 2,520 DSP slices and 32.1 Mb of block RAM.
Does the XCKU9P have transceivers?
Yes, 28 GTH transceivers at up to 16.3 Gb/s.
What are the alternatives to the XCKU9P?
Devices of similar size in other families include XC7K480T (AMD Kintex-7), XC7K420T (AMD Kintex-7), LAV-AT-G70 (Lattice Avant-G).
Which software is used to design with the XCKU9P?
Designs for the XCKU9P are built with AMD Vivado.
Other Kintex UltraScale+ devices
| Device | LUT4-eq. | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe |
|---|---|---|---|---|---|---|---|
| XCKU3P | 261K 163K LUT6 | 356K SLC | 1,368 | 12.7 Mb | 304 | 16 GTY 32.75 Gb/s | Gen3 |
| XCKU5P | 347K 217K LUT6 | 475K SLC | 1,824 | 16.9 Mb | 304 | 16 GTY 32.75 Gb/s | Gen3 |
| XCKU9P | 438K 274K LUT6 | 600K SLC | 2,520 | 32.1 Mb | 304 | 28 GTH 16.3 Gb/s | — |
| XCKU11P | 478K 299K LUT6 | 653K SLC | 2,928 | 21.1 Mb | 512 | 52 GTH/GTY 32.75 Gb/s | Gen3 |
| XCKU13P | 546K 341K LUT6 | 747K SLC | 3,528 | 26.2 Mb | 304 | 28 GTH 16.3 Gb/s | — |
| XCKU15P | 837K 523K LUT6 | 1143K SLC | 1,968 | 34.6 Mb | 668 | 76 GTH/GTY 32.75 Gb/s | Gen3 |
| XCKU19P | 1347K 842K LUT6 | 1843K SLC | 1,080 | 60.8 Mb | 540 | 32 GTY 32.75 Gb/s | Gen3 |
Source: AMD UltraScale+ FPGAs Product Selection Guide, XMP103 (v2.8). Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.