FPGA & adaptive SoC databook · online editionRev. 2026.10

GW1N-9 vs XC6SLX9

A comparison of the Gowin LittleBee GW1N-9 and the AMD Spartan-6 XC6SLX9 using the data from both vendors' selection guides.

Side-by-side specifications

GW1N-9XC6SLX9
Vendor / familyGowin LittleBeeAMD Spartan-6
LUTs as published8,640 LUT45,720 LUT6
LUT type4-input look-up table6-input look-up table, fracturable into two LUT5 with shared inputs
LUT4 equivalent (approx.)≈8,640≈9,152
CoreScore (SERV cores)——
Vendor logic figure—9,152 LC
DSP20 18×18 multipliers16 DSP48A1 slices
Block RAM0.5 Mb0.6 Mb
Large RAM——
Max. user I/O276200
TransceiversNoneNone
Hard PCI ExpressNoneNone
Hard processorNoneNone
Process55 nm45 nm
Configuration memoryEmbedded flashSRAM
Packages195
Design toolGowin EDAAMD ISE Design Suite

Highlighted values are higher. LUT counts are shown as published; the LUT4 equivalent is an approximation to compare different LUT types, see how FPGA vendors count logic. Add up to two more devices to this comparison.

Key differences

Both devices offer similar logic capacity: 8.6K and 9.2K LUT4 equivalents.

They use different logic architectures: the GW1N-9 is built from LUT4 and the XC6SLX9 from LUT6, so the raw LUT counts (8.6K vs 5.7K) are not directly comparable.

For arithmetic, the GW1N-9 has 20 18×18 multipliers against 16 DSP48A1 slices on the XC6SLX9.

The XC6SLX9 has more on-chip memory (0.6 Mb vs 0.5 Mb).

Configuration memory: embedded flash on the GW1N-9, sram on the XC6SLX9.

The GW1N-9 is designed with Gowin EDA; open source: Yosys + nextpnr-himbaechel with Project Apicula and the XC6SLX9 with AMD ISE Design Suite.

Full specifications

See the complete spec sheets with packages and grades: GW1N-9 (LittleBee) and XC6SLX9 (Spartan-6).