FPGA & adaptive SoC databook · online editionRev. 2026.10

GW5ART-15 vs M2GL010

A comparison of the Gowin Arora V GW5ART-15 and the Microchip IGLOO2 M2GL010 using the data from both vendors' selection guides.

Side-by-side specifications

GW5ART-15M2GL010
Vendor / familyGowin Arora VMicrochip IGLOO2
LUTs as published15,120 LUT412,084 LUT4
LUT type4-input look-up table4-input look-up table
LUT4 equivalent (approx.)≈15,120≈12,084
CoreScore (SERV cores)——
Vendor logic figure—12,084 LE
DSP28 27×18 DSP blocks22 18×18 math blocks (MACC)
Block RAM0.6 Mb0.4 Mb
Large RAM——
Max. user I/O53233
Transceivers4 × SERDES 12.5 Gb/s4 × SERDES 5 Gb/s
Hard PCI ExpressGen3 x4Gen2
Hard processorNoneNone
Process22 nm65 nm
Configuration memorySRAMNon-volatile (flash)
Packages54
Design toolGowin EDAMicrochip Libero SoC

Highlighted values are higher. LUT counts are shown as published; the LUT4 equivalent is an approximation to compare different LUT types, see how FPGA vendors count logic. Add up to two more devices to this comparison.

Key differences

The GW5ART-15 has about 25% more logic capacity (15.1K vs 12.1K LUT4 equivalents).

For arithmetic, the GW5ART-15 has 28 27×18 DSP blocks against 22 18×18 math blocks (MACC) on the M2GL010.

The GW5ART-15 has more on-chip memory (0.6 Mb vs 0.4 Mb).

Both have transceivers: 4 at up to 12.5 Gb/s on the GW5ART-15 and 4 at up to 5 Gb/s on the M2GL010.

Configuration memory: sram on the GW5ART-15, non-volatile (flash) on the M2GL010.

The GW5ART-15 is designed with Gowin EDA and the M2GL010 with Microchip Libero SoC.

Full specifications

See the complete spec sheets with packages and grades: GW5ART-15 (Arora V) and M2GL010 (IGLOO2).