M2GL010

MicrochipIGLOO2

The M2GL010 is an IGLOO2 FPGA from Microchip, built on a 65 nm process. It provides 12,084 LUT4 look-up tables, 12,084 flip-flops, 0.4 Mb of block RAM and 22 18×18 math blocks (MACC). It offers up to 233 user I/O pins and 4 SERDES transceivers at up to 5 Gb/s, with hard PCI Express Gen2 blocks. It is available in 4 packages, from the VF256 (14 × 14 mm) to the FG484 (23 × 23 mm). Temperature grades: commercial, industrial, military, automotive. Designs are built with Microchip Libero SoC.

12,084LUTs (LUT4)

2218×18 math blocks (MACC)

0.4 MbBlock RAM

233Max. user I/O

4Transceivers (5 Gb/s)

Specifications

Vendor	Microchip
Family	IGLOO2
Series	Flash FPGAs
Process	65 nm
Configuration memory	Non-volatile (flash)
Look-up tables (LUT4)	12,084
Logic block	4-input look-up table
LUT note	Logic elements are a 4-input LUT plus a flip-flop (Microchip)
Logic elements (LEs)	12,084
Flip-flops	12,084
Block RAM	0.4 Mb (21 × 18 Kb)
In-package memory	256 KB eNVM, 64 KB eSRAM, 22 × 1 Kb uSRAM
DSP (18×18 math block (MACC))	22
Clock management tiles	2

Max. user I/O	233
SERDES transceivers	4 × 5 Gb/s
PCI Express	Gen2
Hard memory controller	DDR2/DDR3 (1 × 18)
Analog / monitor	None
Design tool	Microchip Libero SoC

Packages

Package	Size (mm)	Pitch (mm)	User I/O	Transceivers
VF256	14 × 14	0.8	138	2
VF400	17 × 17	0.8	195	4
TQ144	20 × 20	0.5	84	—
FG484	23 × 23	1.0	233	4

Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).

Speed and temperature grades

Temperature grade	Junction range	Speed grades
Commercial (C)	0 to 85 °C	STD, -1
Industrial (I)	−40 to 100 °C	STD, -1
Military (M)	—	STD, -1
Automotive (A)	—	STD, -1

Alternatives to the M2GL010

Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.

Device	LUTs	Vendor logic	DSP	Block RAM	Max I/O	Transceivers	PCIe	CoreScore
XC7A12TAMD Artix-7	8,000 LUT6	12.8K LC	40	0.7 Mb	150	2 GTP 6.6 Gb/s	Gen2	—
XC7A15TAMD Artix-7	10,400 LUT6	16.6K LC	45	0.9 Mb	250	4 GTP 6.6 Gb/s	Gen2	—
LFE5UM-25Lattice ECP5	24,000 LUT4	—	28	1 Mb	197	2 SERDES 3.2 Gb/s	—	—
LFE5UM5G-25Lattice ECP5	24,000 LUT4	—	28	1 Mb	197	2 SERDES 5 Gb/s	—	—
EP4CGX22Altera Cyclone IV	21,000 LUT4	21K LE	40	0.7 Mb	150	4 XCVR 3.125 Gb/s	Gen2	—
GW5AT-15Gowin Arora V	15,120 LUT4	—	28	0.6 Mb	53	4 SERDES 12.5 Gb/s	Gen3	—

Compare side by side: M2GL010 vs XC7A12T, M2GL010 vs XC7A15T, M2GL010 vs LFE5UM-25, M2GL010 vs GW5AT-15.

Compare the M2GL010 with up to three other FPGAs.

M2GL010 quick facts

How many LUTs does the M2GL010 have?

The M2GL010 has 12,084 LUT4 look-up tables. Logic block: 4-input look-up table.

How many DSP blocks does the M2GL010 have?

The M2GL010 has 22 18×18 math blocks (MACC) and 0.4 Mb of block RAM.

Does the M2GL010 have transceivers?

Yes, 4 SERDES transceivers at up to 5 Gb/s.

What are the alternatives to the M2GL010?

Devices of similar size in other families include XC7A12T (AMD Artix-7), XC7A15T (AMD Artix-7), LFE5UM-25 (Lattice ECP5).

Which software is used to design with the M2GL010?

Designs for the M2GL010 are built with Microchip Libero SoC.

Other IGLOO2 devices

Device	LUTs	Vendor logic	DSP	Block RAM	Max I/O	Transceivers	PCIe	CoreScore
M2GL005	6,060 LUT4	6.1K LE	11	0.2 Mb	209	—	—	—
M2GL010	12,084 LUT4	12.1K LE	22	0.4 Mb	233	4 SERDES 5 Gb/s	Gen2	—
M2GL025	27,696 LUT4	27.7K LE	34	0.5 Mb	267	4 SERDES 5 Gb/s	Gen2	—
M2GL050	56,340 LUT4	56.3K LE	72	1.2 Mb	377	8 SERDES 5 Gb/s	Gen2	—
M2GL060	56,520 LUT4	56.5K LE	72	1.2 Mb	387	4 SERDES 5 Gb/s	Gen2	—
M2GL090	86,184 LUT4	86.2K LE	84	1.9 Mb	425	4 SERDES 5 Gb/s	Gen2	—
M2GL150	146,124 LUT4	146K LE	240	4.2 Mb	574	16 SERDES 5 Gb/s	Gen2	—

Source: IGLOO2 FPGA Product Brief, PB0121 rev. 15.0. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.