GW5AS-25 vs M2S010
A comparison of the Gowin Arora V GW5AS-25 and the Microchip SmartFusion2 M2S010 using the data from both vendors' selection guides.
Side-by-side specifications
| GW5AS-25 | M2S010 | |
|---|---|---|
| Vendor / family | Gowin Arora V | Microchip SmartFusion2 |
| LUTs as published | 23,040 LUT4 | 12,084 LUT4 |
| LUT type | 4-input look-up table | 4-input look-up table |
| LUT4 equivalent (approx.) | ≈23,040 | ≈12,084 |
| CoreScore (SERV cores) | — | — |
| Vendor logic figure | — | 12,084 LE |
| DSP | 28 27×18 DSP blocks | 22 18×18 math blocks (MACC) |
| Block RAM | 1 Mb | 0.4 Mb |
| Large RAM | — | — |
| Max. user I/O | 239 | 233 |
| Transceivers | None | 4 × SERDES 5 Gb/s |
| Hard PCI Express | None | Gen2 |
| Hard processor | 1× Cortex-M4 | 1× Arm Cortex-M3 |
| Process | 22 nm | 65 nm |
| Configuration memory | SRAM | Non-volatile (flash) |
| Packages | 3 | 4 |
| Design tool | Gowin EDA | Microchip Libero SoC |
Highlighted values are higher. LUT counts are shown as published; the LUT4 equivalent is an approximation to compare different LUT types, see how FPGA vendors count logic. Add up to two more devices to this comparison.
Key differences
The GW5AS-25 has about 91% more logic capacity (23K vs 12.1K LUT4 equivalents).
For arithmetic, the GW5AS-25 has 28 27×18 DSP blocks against 22 18×18 math blocks (MACC) on the M2S010.
The GW5AS-25 has more on-chip memory (1 Mb vs 0.4 Mb).
Only the M2S010 has multi-gigabit transceivers (4 5 Gb/s).
Configuration memory: sram on the GW5AS-25, non-volatile (flash) on the M2S010.
The GW5AS-25 is designed with Gowin EDA and the M2S010 with Microchip Libero SoC.
Full specifications
See the complete spec sheets with packages and grades: GW5AS-25 (Arora V) and M2S010 (SmartFusion2).