FPGA & adaptive SoC databook · online editionRev. 2026.10

GW5AS-25

GowinArora V

The GW5AS-25 is an Arora V SoC FPGA from Gowin, built on a 22 nm process. It provides 23,040 LUT4 look-up tables, 23,040 flip-flops, 1 Mb of block RAM and 28 27×18 DSP blocks. Its processing system includes a single Cortex-M4 core. The programmable logic offers up to 239 user I/O pins. It is available in 3 packages, from the UG256 (14 × 14 mm) to the PG256 (17 × 17 mm). Designs are built with Gowin EDA.

23KLUT4-equivalent
23KLUTs (LUT4)
2827×18 DSP blocks
1 MbBlock RAM
239Max. user I/O
—Transceivers
1× Cortex-M4Hard processor

Specifications

VendorGowin
FamilyArora V
SeriesGW5A
Process22 nm
Configuration memorySRAM
LUT4-equivalent capacity23,040
Look-up tables (LUT4)23,040
Flip-flops23,040
Distributed RAM180 Kb
Block RAM1 Mb (56 × 18 Kb)
DSP (27×18 DSP block)28
Max. user I/O239
PL transceiversNone
PCI Express (PL)None
Analog / monitorADC
Hard processor1× Cortex-M4
Design toolGowin EDA

Packages

PackageSize (mm)Pitch (mm)User I/OTransceivers
UG25614 × 140.8144—
PG25617 × 171.0184—
UG324F15 × 150.8223—

Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).

Alternatives to the GW5AS-25

Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.

DeviceLUT4-eq.Vendor logicDSPBlock RAMMax I/OTransceiversPCIe
A3C 025Altera Agilex 317K 8.5K ALMs25.1K LE341.3 Mb256——
5CSEA2Altera Cyclone V18.9K 9.4K ALMs25K LE361.4 Mb145——
A3C 050Altera Agilex 332K 16K ALMs47.2K LE652.4 Mb256——
XC7Z007SAMD Zynq 700023K 14.4K LUT623K LC661.8 Mb100——
A5E 005BAltera Agilex 5 E-Series34.2K 17.1K ALMs50.4K LE652.5 Mb256——
XC7Z010AMD Zynq 700028.2K 17.6K LUT628K LC802.1 Mb100——

Compare side by side: GW5AS-25 vs A3C 025, GW5AS-25 vs 5CSEA2, GW5AS-25 vs A3C 050.

GW5AS-25 quick facts

How many LUTs does the GW5AS-25 have?

The GW5AS-25 has 23,040 LUT4 look-up tables, about 23,040 LUT4 equivalents.

How many DSP blocks does the GW5AS-25 have?

The GW5AS-25 has 28 27×18 DSP blocks and 1 Mb of block RAM.

Does the GW5AS-25 have transceivers?

No, the GW5AS-25 has no multi-gigabit transceivers. Its user I/O supports up to 239 pins.

Does the GW5AS-25 have a processor?

Yes. It includes a hard 1× Cortex-M4 processor.

What are the alternatives to the GW5AS-25?

Devices of similar size in other families include A3C 025 (Altera Agilex 3), 5CSEA2 (Altera Cyclone V), A3C 050 (Altera Agilex 3).

Which software is used to design with the GW5AS-25?

Designs for the GW5AS-25 are built with Gowin EDA.

Other Arora V devices

DeviceLUT4-eq.Vendor logicDSPBlock RAMMax I/OTransceiversPCIe
GW5AT-1515.1K 15.1K LUT4—280.6 Mb534 SERDES 12.5 Gb/sGen3
GW5ART-1515.1K 15.1K LUT4—280.6 Mb534 SERDES 12.5 Gb/sGen3
GW5A-2523K 23K LUT4—281 Mb239——
GW5AR-2523K 23K LUT4—281 Mb239——
GW5AS-2523K 23K LUT4—281 Mb239——
GW5A-6059.9K 59.9K LUT4—1182.1 Mb320——
GW5AT-6059.9K 59.9K LUT4—1182.1 Mb3204 SERDES 12.5 Gb/sGen3
GW5AT-7586.7K 86.7K LUT4—2134.5 Mb3128 SERDES 12.5 Gb/sGen3
GW5A-138138K 138K LUT4—2986 Mb312——
GW5AT-138138K 138K LUT4—2986 Mb3128 SERDES 12.5 Gb/sGen3
GW5AS-138138K 138K LUT4—2986 Mb312——
GW5AST-138138K 138K LUT4—2986 Mb3768 SERDES 12.5 Gb/sGen3

Source: Gowin Arora V product page, retrieved 2026-10-24. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.