Mach-N2 MH10 vs XCAU7P
A comparison of the Lattice Mach-N2 Mach-N2 MH10 and the AMD Artix UltraScale+ XCAU7P using the data from both vendors' selection guides.
Side-by-side specifications
| Mach-N2 MH10 | XCAU7P | |
|---|---|---|
| Vendor / family | Lattice Mach-N2 | AMD Artix UltraScale+ |
| LUTs as published | 61,000 LUT4 | 37,000 LUT6 |
| LUT type | 4-input look-up table | 6-input look-up table, fracturable into two LUT5 with shared inputs |
| LUT4 equivalent (approx.) | ≈61,000 | ≈59,200 |
| CoreScore (SERV cores) | — | — |
| Vendor logic figure | 100,000 LC | 82,000 SLC |
| DSP | 240 18×18 multipliers | 216 DSP slices |
| Block RAM | 5.5 Mb | 3.8 Mb |
| Large RAM | — | — |
| Max. user I/O | 196 | 248 |
| Transceivers | 4 × SERDES 16 Gb/s | 4 × GTH 16.3 Gb/s |
| Hard PCI Express | None | Gen3 x4 |
| Hard processor | None | None |
| Process | 16 nm | 16 nm |
| Configuration memory | Internal flash | SRAM |
| Packages | 2 | 2 |
| Design tool | Lattice Radiant | AMD Vivado |
Highlighted values are higher. LUT counts are shown as published; the LUT4 equivalent is an approximation to compare different LUT types, see how FPGA vendors count logic. Add up to two more devices to this comparison.
Key differences
Both devices offer similar logic capacity: 61K and 59.2K LUT4 equivalents.
They use different logic architectures: the Mach-N2 MH10 is built from LUT4 and the XCAU7P from LUT6, so the raw LUT counts (61K vs 37K) are not directly comparable.
For arithmetic, the Mach-N2 MH10 has 240 18×18 multipliers against 216 DSP slices on the XCAU7P.
The Mach-N2 MH10 has more on-chip memory (5.5 Mb vs 3.8 Mb).
Both have transceivers: 4 at up to 16 Gb/s on the Mach-N2 MH10 and 4 at up to 16.3 Gb/s on the XCAU7P.
Configuration memory: internal flash on the Mach-N2 MH10, sram on the XCAU7P.
The Mach-N2 MH10 is designed with Lattice Radiant and the XCAU7P with AMD Vivado.
Full specifications
See the complete spec sheets with packages and grades: Mach-N2 MH10 (Mach-N2) and XCAU7P (Artix UltraScale+).