FPGA & adaptive SoC databook · online editionRev. 2026.10

Mach-N2 MH21D vs XC7K160T

A comparison of the Lattice Mach-N2 Mach-N2 MH21D and the AMD Kintex-7 XC7K160T using the data from both vendors' selection guides.

Side-by-side specifications

Mach-N2 MH21DXC7K160T
Vendor / familyLattice Mach-N2AMD Kintex-7
LUTs as published132,000 LUT4101,400 LUT6
LUT type4-input look-up table6-input look-up table, fracturable into two LUT5 with shared inputs
LUT4 equivalent (approx.)≈132,000≈162,240
CoreScore (SERV cores)—481
Vendor logic figure215,000 LC162,240 LC
DSP520 18×18 multipliers600 DSP slices
Block RAM10.4 Mb11.4 Mb
Large RAM——
Max. user I/O236400
Transceivers4 × SERDES 16 Gb/s8 × GTX 12.5 Gb/s
Hard PCI ExpressNoneGen2
Hard processorNoneNone
Process16 nm28 nm
Configuration memoryInternal flashSRAM
Packages13
Design toolLattice RadiantAMD Vivado

Highlighted values are higher. LUT counts are shown as published; the LUT4 equivalent is an approximation to compare different LUT types, see how FPGA vendors count logic. Add up to two more devices to this comparison.

Key differences

The XC7K160T has about 23% more logic capacity (162K vs 132K LUT4 equivalents).

They use different logic architectures: the Mach-N2 MH21D is built from LUT4 and the XC7K160T from LUT6, so the raw LUT counts (132K vs 101K) are not directly comparable.

For arithmetic, the XC7K160T has 600 DSP slices against 520 18×18 multipliers on the Mach-N2 MH21D.

Both have transceivers: 4 at up to 16 Gb/s on the Mach-N2 MH21D and 8 at up to 12.5 Gb/s on the XC7K160T.

Configuration memory: internal flash on the Mach-N2 MH21D, sram on the XC7K160T.

The Mach-N2 MH21D is designed with Lattice Radiant and the XC7K160T with AMD Vivado; open source: openXC7 (experimental) with Project X-Ray.

Full specifications

See the complete spec sheets with packages and grades: Mach-N2 MH21D (Mach-N2) and XC7K160T (Kintex-7).