FPGA & adaptive SoC databook · online editionRev. 2026.10

Mach-N2 MH21D

LatticeMach-N2

The Mach-N2 MH21D is a Mach-N2 FPGA from Lattice, built on a 16 nm process. It provides 132,000 LUT4 look-up tables (215,000 logic cells), 10.4 Mb of block RAM and 520 18×18 multipliers. It offers up to 236 user I/O pins and 4 SERDES transceivers at up to 16 Gb/s. It comes in a single package, the CBG484 (18 × 18 mm). Temperature grades: commercial, industrial. Designs are built with Lattice Radiant.

132,000LUTs (LUT4)
52018×18 multipliers
10.4 MbBlock RAM
236Max. user I/O
4Transceivers (16 Gb/s)

Specifications

VendorLattice
FamilyMach-N2
SeriesNexus 2
Process16 nm
Configuration memoryInternal flash
Look-up tables (LUT4)132,000
   Logic block4-input look-up table
Logic cells215,000
Distributed RAM1,370 Kb
Block RAM10.4 Mb (289 × 36 Kb)
DSP (18×18 multiplier)520
Max. user I/O236
SERDES transceivers4 × 16 Gb/s
PCI ExpressNone
Analog / monitorNone
Design toolLattice Radiant

Packages

PackageSize (mm)Pitch (mm)User I/OTransceivers
CBG48418 × 180.82364

Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).

Speed and temperature grades

Temperature gradeJunction rangeSpeed grades
Commercial (C)0 to 85 °C—
Industrial (I)−40 to 100 °C—

Alternatives to the Mach-N2 MH21D

Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.

DeviceLUTsVendor logicDSPBlock RAMMax I/OTransceiversPCIeCoreScore
Certus-N2 CT20Lattice Certus-N2135,000 LUT4220K LC52012 Mb2988 SERDES 16 Gb/s——
5AGTC3Altera Arria V58,900 ALMs156K LE39610.3 Mb4167 XCVR/XCVR 10.3125 Gb/sGen2—
XC7K160TAMD Kintex-7101,400 LUT6162K LC60011.4 Mb4008 GTX 12.5 Gb/sGen2481 marble
5AGXA3Altera Arria V58,900 ALMs156K LE39610.3 Mb4169 XCVR 6.5536 Gb/sGen2—
Certus-N2 CT16Lattice Certus-N298,000 LUT4160K LC3608 Mb2988 SERDES 16 Gb/s——
MPF100TMicrochip PolarFire109,000 LUT4109K LE3366.9 Mb2848 SERDES 12.7 Gb/sGen2—

Compare side by side: Mach-N2 MH21D vs Certus-N2 CT20, Mach-N2 MH21D vs 5AGTC3, Mach-N2 MH21D vs XC7K160T.

Compare the Mach-N2 MH21D with up to three other FPGAs.

Mach-N2 MH21D quick facts

How many LUTs does the Mach-N2 MH21D have?

The Mach-N2 MH21D has 132,000 LUT4 look-up tables (215,000 logic cells as published by Lattice). Logic block: 4-input look-up table.

How many DSP blocks does the Mach-N2 MH21D have?

The Mach-N2 MH21D has 520 18×18 multipliers and 10.4 Mb of block RAM.

Does the Mach-N2 MH21D have transceivers?

Yes, 4 SERDES transceivers at up to 16 Gb/s.

What are the alternatives to the Mach-N2 MH21D?

Devices of similar size in other families include Certus-N2 CT20 (Lattice Certus-N2), 5AGTC3 (Altera Arria V), XC7K160T (AMD Kintex-7).

Which software is used to design with the Mach-N2 MH21D?

Designs for the Mach-N2 MH21D are built with Lattice Radiant.

Other Mach-N2 devices

DeviceLUTsVendor logicDSPBlock RAMMax I/OTransceiversPCIeCoreScore
Mach-N2 MH0640,000 LUT465K LC1204 Mb1964 SERDES 16 Gb/s——
Mach-N2 MH1061,000 LUT4100K LC2405.5 Mb1964 SERDES 16 Gb/s——
Mach-N2 MH1698,000 LUT4160K LC3608 Mb2484 SERDES 16 Gb/s——
Mach-N2 MH21D132,000 LUT4215K LC52010.4 Mb2364 SERDES 16 Gb/s——
Mach-N2 MH20135,000 LUT4220K LC52012 Mb2484 SERDES 16 Gb/s——

Source: Lattice Mach-N2 product page, Family Table, retrieved 2026-10-26. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.