FPGA & adaptive SoC databook · online editionRev. 2026.10

XCZU5CG vs XCZU64DR

A comparison of the AMD Zynq UltraScale+ MPSoC XCZU5CG and the AMD Zynq UltraScale+ RFSoC XCZU64DR using the data from both vendors' selection guides.

Side-by-side specifications

XCZU5CGXCZU64DR
Vendor / familyAMD Zynq UltraScale+ MPSoCAMD Zynq UltraScale+ RFSoC
LUTs as published117,000 LUT6150,000 LUT6
LUT type6-input look-up table, fracturable into two LUT5 with shared inputs6-input look-up table, fracturable into two LUT5 with shared inputs
LUT4 equivalent (approx.)≈187,200≈240,000
CoreScore (SERV cores)——
Vendor logic figure256,000 SLC328,000 SLC
DSP1,248 DSP slices1,872 DSP slices
Block RAM5.1 Mb15.8 Mb
Large RAM18 Mb22.5 Mb
Max. user I/O252154
Transceivers16 × GTH 16.3 Gb/s8 × GTY 28.21 Gb/s
Hard PCI ExpressGen3 x8None
Hard processor2× Arm Cortex-A534× Arm Cortex-A53
Process16 nm16 nm
Configuration memorySRAMSRAM
Packages31
Design toolAMD VivadoAMD Vivado

Highlighted values are higher. LUT counts are shown as published; the LUT4 equivalent is an approximation to compare different LUT types, see how FPGA vendors count logic. Add up to two more devices to this comparison.

Key differences

The XCZU64DR has about 28% more logic capacity (240K vs 187K LUT4 equivalents).

For arithmetic, the XCZU64DR has 1,872 DSP slices against 1,248 DSP slices on the XCZU5CG.

The XCZU64DR has more on-chip memory (38.3 Mb vs 23.1 Mb).

Both have transceivers: 16 at up to 16.3 Gb/s on the XCZU5CG and 8 at up to 28.21 Gb/s on the XCZU64DR.

The XCZU5CG is designed with AMD Vivado and the XCZU64DR with AMD Vivado.

Full specifications

See the complete spec sheets with packages and grades: XCZU5CG (Zynq UltraScale+ MPSoC) and XCZU64DR (Zynq UltraScale+ RFSoC).