FPGA & adaptive SoC databook ยท online editionRev. 2026.10

Altera Stratix 10 DX FPGAs

The Altera Stratix 10 DX family has 3 devices, built on the 14 nm process, ranging from 449K ALMs to 933K ALMs and from 2,592 to 5,760 variable-precision DSP blocks. It uses adaptive logic modules (ALMs). Transceivers: GXE, GXP, up to 57.8 Gb/s.

DeviceLUTsVendor logicDSPBlock RAMMax I/OTransceiversPCIeCoreScore
DX 1100449,280 ALMs1325K LE2,592107 Mb52832 GXP/GXE 57.8 Gb/sGen4โ€”
DX 2100702,720 ALMs2073K LE3,960134 Mb61284 GXP/GXE 57.8 Gb/sGen4โ€”
DX 2800933,120 ALMs2753K LE5,760229 Mb81684 GXP/GXE 57.8 Gb/sGen4โ€”

Source: Altera Stratix 10 DX FPGA Product Table, 2025.09.23.