DX 2800
AlteraStratix 10 DXThe DX 2800 is a Stratix 10 DX FPGA from Altera, built on a 14 nm process. It provides 933,120 adaptive logic modules (ALMs) (2,753,000 logic elements (LEs)), 3,732,480 flip-flops, 229 Mb of block RAM and 5,760 variable-precision DSP blocks. It offers up to 816 user I/O pins and 84 GXP/GXE transceivers at up to 57.8 Gb/s, with hard PCI Express Gen4 x16 blocks. It comes in a single package, the F2912 (55 × 55 mm). Designs are built with Altera Quartus Prime.
Specifications
| Vendor | Altera |
|---|---|
| Family | Stratix 10 DX |
| Series | Stratix |
| Process | 14 nm |
| Configuration memory | SRAM |
| Adaptive logic modules (ALMs) | 933,120 |
| Logic block | adaptive logic module: fracturable 8-input LUT (one 6-input or two independent 4-input functions) |
| LUT note | Adaptive logic modules (ALMs): fracturable 8-input LUTs; each ALM can implement two 4-input functions |
| LUT4 equivalent (approx.) | ≈1,866,240 |
| Logic elements (LEs) | 2,753,000 |
| Flip-flops | 3,732,480 |
| Distributed RAM | 15,360 Kb |
| Block RAM | 229 Mb (11721 × 20 Kb) |
| DSP (variable-precision DSP block) | 5,760 |
| Max. user I/O | 816 |
|---|---|
| Differential pairs | 408 |
| GXP transceivers | 76 × 16 Gb/s |
| GXE transceivers | 8 × 57.8 Gb/s |
| PCI Express | 4× Gen4 x16 |
| 100G Ethernet MAC | 2 |
| Analog / monitor | None |
| Design tool | Altera Quartus Prime |
Packages
| Package | Size (mm) | Pitch (mm) | User I/O | Transceivers |
|---|---|---|---|---|
| F2912 | 55 × 55 | 1.0 | 816 | 84 |
Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).
Alternatives to the DX 2800
Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.
| Device | LUTs | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe | CoreScore |
|---|---|---|---|---|---|---|---|---|
| GX 2800Altera Stratix 10 GX/SX | 933,120 ALMs | 2753K LE | 5,760 | 229 Mb | 1,160 | 96 XCVR/XCVR 28.3 Gb/s | Gen3 | 5,600 intel_s10gx_devkit |
| GX 2500Altera Stratix 10 GX/SX | 821,150 ALMs | 2422K LE | 5,011 | 195 Mb | 1,160 | 96 XCVR/XCVR 28.3 Gb/s | Gen3 | — |
| XCVU7PAMD Virtex UltraScale+ | 788,000 LUT6 | 1724K SLC | 4,560 | 50.6 Mb | 832 | 80 GTY 32.75 Gb/s | Gen3 | — |
| XCVU9PAMD Virtex UltraScale+ | 1,182,000 LUT6 | 2586K SLC | 6,840 | 75.9 Mb | 832 | 120 GTY 32.75 Gb/s | Gen3 | 5,087 vcu118 |
| XCVU35PAMD Virtex UltraScale+ HBM | 872,000 LUT6 | 1907K SLC | 5,952 | 47.3 Mb | 416 | 64 GTY 32.75 Gb/s | Gen3 | — |
| XCVU45PAMD Virtex UltraScale+ HBM | 872,000 LUT6 | 1907K SLC | 5,952 | 47.3 Mb | 416 | 64 GTY 32.75 Gb/s | Gen3 | — |
Compare side by side: DX 2800 vs GX 2800, DX 2800 vs GX 2500, DX 2800 vs XCVU7P, DX 2800 vs XCVU9P, DX 2800 vs XCVU35P, DX 2800 vs XCVU45P.
Compare the DX 2800 with up to three other FPGAs.
DX 2800 quick facts
How many LUTs does the DX 2800 have?
The DX 2800 has 933,120 adaptive logic modules (ALMs) (2,753,000 logic elements (les) as published by Altera). Logic block: adaptive logic module: fracturable 8-input LUT (one 6-input or two independent 4-input functions).
How many DSP blocks does the DX 2800 have?
The DX 2800 has 5,760 variable-precision DSP blocks and 229 Mb of block RAM.
Does the DX 2800 have transceivers?
Yes, 84 GXP/GXE transceivers at up to 57.8 Gb/s.
What are the alternatives to the DX 2800?
Devices of similar size in other families include GX 2800 (Altera Stratix 10 GX/SX), GX 2500 (Altera Stratix 10 GX/SX), XCVU7P (AMD Virtex UltraScale+).
Which software is used to design with the DX 2800?
Designs for the DX 2800 are built with Altera Quartus Prime.
Other Stratix 10 DX devices
| Device | LUTs | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe | CoreScore |
|---|---|---|---|---|---|---|---|---|
| DX 1100 | 449,280 ALMs | 1325K LE | 2,592 | 107 Mb | 528 | 32 GXP/GXE 57.8 Gb/s | Gen4 | — |
| DX 2100 | 702,720 ALMs | 2073K LE | 3,960 | 134 Mb | 612 | 84 GXP/GXE 57.8 Gb/s | Gen4 | — |
| DX 2800 | 933,120 ALMs | 2753K LE | 5,760 | 229 Mb | 816 | 84 GXP/GXE 57.8 Gb/s | Gen4 | — |
Source: Altera Stratix 10 DX FPGA Product Table, 2025.09.23. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.