XC2VE3504

AMDVersal AI Edge Gen 2SoC

The XC2VE3504 is a Versal AI Edge Gen 2 SoC FPGA from AMD. It provides 225,000 LUT6 look-up tables (492,188 system logic cells), 450,000 flip-flops, 13.6 Mb of block RAM plus 3.4 Mb of UltraRAM and 700 DSP Engines. Its processing system includes four Arm Cortex-A78AE cores, a Arm Cortex-R52 real-time processor. The programmable logic offers up to 428 user I/O pins and 12 GTYP transceivers at up to 32.75 Gb/s, with hard PCI Express Gen5 x4 blocks. It is available in 2 packages, from the SSVA1440 ( mm) to the SSVA2112 ( mm). Designs are built with AMD Vivado.

225,000LUTs (LUT6)

700DSP Engines

13.6 MbBlock RAM

3.4 MbUltraRAM

428Max. user I/O

12Transceivers (32.75 Gb/s)

4× A78AEHard processor

Specifications

Vendor	AMD
Family	Versal AI Edge Gen 2
Series	Versal
Configuration memory	SRAM
Look-up tables (LUT6)	225,000
Logic block	6-input look-up table, fracturable into two LUT5 with shared inputs
LUT4 equivalent (approx.)	≈360,000
System logic cells	492,188
Flip-flops	450,000
Distributed RAM	7,066 Kb
Block RAM	13.6 Mb
UltraRAM	3.4 Mb
AI Engines	96 AI Engine-ML tiles
DSP (DSP Engine)	700

Max. user I/O	428
GTYP transceivers	12 × 32.75 Gb/s
PCI Express (PL)	3× Gen5 x4
Analog / monitor	System Monitor
Hard processor	4× Arm Cortex-A78AE
Real-time processor	Arm Cortex-R52
Design tool	AMD Vivado

Packages

Package	Size (mm)	Pitch (mm)	User I/O	PS I/O	Transceivers
SSVA1440		0.8	416	78	12
SSVA2112		0.8	428	78	20

Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).

Alternatives to the XC2VE3504

Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.

Device	LUTs	Vendor logic	DSP	Block RAM	Max I/O	Transceivers	PCIe	CoreScore
XC2VM3558AMD Versal Prime Gen 2	225,000 LUT6	492K SLC	700	13.6 Mb	428	12 GTYP 32.75 Gb/s	Gen5	—
XC7Z045AMD Zynq 7000	218,600 LUT6	350K LC	900	19.2 Mb	362	16 GTX 12.5 Gb/s	Gen2	—
A5E 043AAltera Agilex 5 E-Series	147,200 ALMs	434K LE	564	20.5 Mb	504	16 XCVR 28 Gb/s	Gen4	—
A5E 043BAltera Agilex 5 E-Series	147,200 ALMs	434K LE	564	20.5 Mb	504	16 XCVR 17 Gb/s	Gen4	—
MPFS250TMicrochip PolarFire SoC	254,000 LUT4	254K LE	784	15.9 Mb	372	16 SERDES 12.5 Gb/s	Gen2	—
XC7Z035AMD Zynq 7000	171,900 LUT6	275K LC	900	17.6 Mb	362	16 GTX 12.5 Gb/s	Gen2	—

Compare side by side: XC2VE3504 vs XC2VM3558, XC2VE3504 vs XC7Z045, XC2VE3504 vs A5E 043A, XC2VE3504 vs A5E 043B.

Compare the XC2VE3504 with up to three other FPGAs.

XC2VE3504 quick facts

How many LUTs does the XC2VE3504 have?

The XC2VE3504 has 225,000 LUT6 look-up tables (492,188 system logic cells as published by AMD). Logic block: 6-input look-up table, fracturable into two LUT5 with shared inputs.

How many DSP blocks does the XC2VE3504 have?

The XC2VE3504 has 700 DSP Engines and 13.6 Mb of block RAM plus 3.4 Mb of UltraRAM.

Does the XC2VE3504 have transceivers?

Yes, 12 GTYP transceivers at up to 32.75 Gb/s.

Does the XC2VE3504 have a processor?

Yes. It includes a hard 4× Arm Cortex-A78AE processor.

What are the alternatives to the XC2VE3504?

Devices of similar size in other families include XC2VM3558 (AMD Versal Prime Gen 2), XC7Z045 (AMD Zynq 7000), A5E 043A (Altera Agilex 5 E-Series).

Which software is used to design with the XC2VE3504?

Designs for the XC2VE3504 are built with AMD Vivado.

Other Versal AI Edge Gen 2 devices

Device	LUTs	Vendor logic	DSP	Block RAM	Max I/O	Transceivers	PCIe	CoreScore
XC2VE3304	94,592 LUT6	207K SLC	184	5 Mb	308	4 GTYP 32.75 Gb/s	Gen5	—
XC2VE3358	94,592 LUT6	207K SLC	184	5 Mb	308	4 GTYP 32.75 Gb/s	Gen5	—
XC2VE3504	225,000 LUT6	492K SLC	700	13.6 Mb	428	12 GTYP 32.75 Gb/s	Gen5	—
XC2VE3558	225,000 LUT6	492K SLC	700	13.6 Mb	428	12 GTYP 32.75 Gb/s	Gen5	—
XC2VE3804	543,104 LUT6	1188K SLC	2,064	47.2 Mb	556	20 GTYP 32.75 Gb/s	Gen5	—
XC2VE3858	543,104 LUT6	1188K SLC	2,064	47.2 Mb	556	20 GTYP 32.75 Gb/s	Gen5	—

Source: AMD Versal AI Edge Gen 2 Series Product Selection Guide, XMP505 (v1.5). Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.