FPGA & adaptive SoC databook · online editionRev. 2026.10

AMD Zynq UltraScale+ MPSoC SoC FPGAs

The AMD Zynq UltraScale+ MPSoC family has 25 devices, built on the 16 nm process, ranging from 37K LUT6 to 523K LUT6 and from 216 to 3,528 DSP slices. It uses LUT6 look-up tables. Transceivers: GTH, GTY, up to 32.75 Gb/s.

DeviceLUT4-eq.Vendor logicDSPBlock RAMMax I/OTransceiversPCIe
XCZU1CG59.2K 37K LUT681K SLC2163.8 Mb180——
XCZU1EG59.2K 37K LUT681K SLC2163.8 Mb180——
XCZU2CG75.2K 47K LUT6103K SLC2405.3 Mb252——
XCZU2EG75.2K 47K LUT6103K SLC2405.3 Mb252——
XCZU3CG114K 71K LUT6154K SLC3607.6 Mb252——
XCZU3EG114K 71K LUT6154K SLC3607.6 Mb252——
XCZU3TCG115K 72K LUT6157K SLC5765.1 Mb1248 GTH 16.3 Gb/sGen3
XCZU3TEG115K 72K LUT6157K SLC5765.1 Mb1248 GTH 16.3 Gb/sGen3
XCZU4CG141K 88K LUT6192K SLC7284.5 Mb25216 GTH 16.3 Gb/sGen3
XCZU4EG141K 88K LUT6192K SLC7284.5 Mb25216 GTH 16.3 Gb/sGen3
XCZU4EV141K 88K LUT6192K SLC7284.5 Mb25216 GTH 16.3 Gb/sGen3
XCZU5CG187K 117K LUT6256K SLC1,2485.1 Mb25216 GTH 16.3 Gb/sGen3
XCZU5EG187K 117K LUT6256K SLC1,2485.1 Mb25216 GTH 16.3 Gb/sGen3
XCZU5EV187K 117K LUT6256K SLC1,2485.1 Mb25216 GTH 16.3 Gb/sGen3
XCZU6CG344K 215K LUT6469K SLC1,97325.1 Mb32824 GTH 16.3 Gb/s—
XCZU6EG344K 215K LUT6469K SLC1,97325.1 Mb32824 GTH 16.3 Gb/s—
XCZU7CG368K 230K LUT6504K SLC1,72811 Mb46424 GTH 16.3 Gb/sGen3
XCZU7EG368K 230K LUT6504K SLC1,72811 Mb46424 GTH 16.3 Gb/sGen3
XCZU7EV368K 230K LUT6504K SLC1,72811 Mb46424 GTH 16.3 Gb/sGen3
XCZU9CG438K 274K LUT6600K SLC2,52032.1 Mb32824 GTH 16.3 Gb/s—
XCZU9EG438K 274K LUT6600K SLC2,52032.1 Mb32824 GTH 16.3 Gb/s—
XCZU11EG478K 299K LUT6653K SLC2,92821.1 Mb51248 GTH/GTY 32.75 Gb/sGen3
XCZU15EG546K 341K LUT6747K SLC3,52826.2 Mb32824 GTH 16.3 Gb/s—
XCZU17EG677K 423K LUT6926K SLC1,59028 Mb66872 GTH/GTY 32.75 Gb/sGen3
XCZU19EG837K 523K LUT61143K SLC1,96834.6 Mb66872 GTH/GTY 32.75 Gb/sGen3

Source: AMD Zynq UltraScale+ MPSoC Product Selection Guide, XMP104 (v2.8).