XCZU3TEG

AMDZynq UltraScale+ MPSoCSoC

The XCZU3TEG is a Zynq UltraScale+ MPSoC FPGA from AMD, built on a 16 nm process. It provides 72,000 LUT6 look-up tables (157,000 system logic cells), about 115,200 LUT4 equivalents, 144,000 flip-flops, 5.1 Mb of block RAM plus 14 Mb of UltraRAM and 576 DSP slices. Its processing system includes four Arm Cortex-A53 cores running at up to 1.5 GHz, a dual Arm Cortex-R5F real-time processor and a Mali-400 MP2 GPU. The processing system adds its own PCIe Gen2 x4, 2x USB 3.0, SATA 3.1, DisplayPort, 4x Gigabit Ethernet, with 4 PS-GTR transceivers at 6 Gb/s. The programmable logic offers up to 124 user I/O pins and 8 GTH transceivers at up to 16.3 Gb/s, with hard PCI Express Gen3 x8 blocks. It is available in 2 packages, from the C784 (23 × 23 mm) to the D784 (23 × 23 mm). Temperature grades: extended, industrial. Designs are built with AMD Vivado.

115KLUT4-equivalent

72KLUTs (LUT6)

576DSP slices

14 MbUltraRAM

5.1 MbBlock RAM

124Max. user I/O

8Transceivers (16.3 Gb/s)

4× A53Hard processor

Specifications

Vendor	AMD
Family	Zynq UltraScale+ MPSoC
Series	UltraScale+
Process	16 nm
Configuration memory	SRAM
LUT4-equivalent capacity	115,200
Look-up tables (LUT6)	72,000
System logic cells	157,000
Flip-flops	144,000
Distributed RAM	2,150 Kb
Block RAM	5.1 Mb
UltraRAM	14 Mb
DSP (DSP slice)	576
Clock management tiles	1

Max. user I/O	124
GTH transceivers	8 × 16.3 Gb/s
PCI Express (PL)	Gen3 x8
Analog / monitor	System Monitor
Hard processor	4× Arm Cortex-A53 @ 1.5 GHz
PS-GTR transceivers	4 × 6 Gb/s
PS connectivity	PCIe Gen2 x4, 2x USB 3.0, SATA 3.1, DisplayPort, 4x Gigabit Ethernet
Real-time processor	Dual Arm Cortex-R5F
GPU	Mali-400 MP2
Design tool	AMD Vivado

Packages

Package	Size (mm)	User I/O	PS I/O	Transceivers
C784	23 × 23	124	214	4
D784	23 × 23	124	214	8

Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).

Speed and temperature grades

Temperature grade	Junction range	Speed grades
Extended (E)	0 to 100 °C	-1, -2, -2L
Industrial (I)	−40 to 100 °C	-1, -1L, -2

Alternatives to the XCZU3TEG

Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.

Device	LUT4-eq.	Vendor logic	DSP	Block RAM	Max I/O	Transceivers	PCIe
Ti135Efinix Titanium	130K 130K LUT4	132K LE	480	9.8 Mb	223	8 SERDES 16 Gb/s	Gen4
MPFS160TMicrochip PolarFire SoC	161K 161K LUT4	161K LE	498	10.2 Mb	312	8 SERDES 12.5 Gb/s	Gen2
Ti165Efinix Titanium	160K 160K LUT4	163K LE	590	12.1 Mb	337	16 SERDES 16 Gb/s	Gen4
Ti140Efinix Titanium	≈142K 142K LEs	142K LE	510	10.6 Mb	310	16 SERDES 16 Gb/s	Gen4
XC7Z030AMD Zynq 7000	126K 78.6K LUT6	125K LC	400	9.3 Mb	250	4 GTX 12.5 Gb/s	Gen2
Tz200Efinix Topaz	230K 230K LUT4	215K LE	840	15.8 Mb	227	16 SERDES 12.5 Gb/s	Gen3

Compare side by side: XCZU3TEG vs Ti135, XCZU3TEG vs MPFS160T, XCZU3TEG vs Ti165.

XCZU3TEG quick facts

How many LUTs does the XCZU3TEG have?

The XCZU3TEG has 72,000 LUT6 look-up tables, about 115,200 LUT4 equivalents (157,000 system logic cells as published by AMD).

How many DSP blocks does the XCZU3TEG have?

The XCZU3TEG has 576 DSP slices and 5.1 Mb of block RAM plus 14 Mb of UltraRAM.

Does the XCZU3TEG have transceivers?

Yes, 8 GTH transceivers at up to 16.3 Gb/s.

Does the XCZU3TEG have a processor?

Yes. It includes a hard 4× Arm Cortex-A53 processor.

What are the alternatives to the XCZU3TEG?

Devices of similar size in other families include Ti135 (Efinix Titanium), MPFS160T (Microchip PolarFire SoC), Ti165 (Efinix Titanium).

Which software is used to design with the XCZU3TEG?

Designs for the XCZU3TEG are built with AMD Vivado.

Other Zynq UltraScale+ MPSoC devices

Device	LUT4-eq.	Vendor logic	DSP	Block RAM	Max I/O	Transceivers	PCIe
XCZU1CG	59.2K 37K LUT6	81K SLC	216	3.8 Mb	180	—	—
XCZU1EG	59.2K 37K LUT6	81K SLC	216	3.8 Mb	180	—	—
XCZU2CG	75.2K 47K LUT6	103K SLC	240	5.3 Mb	252	—	—
XCZU2EG	75.2K 47K LUT6	103K SLC	240	5.3 Mb	252	—	—
XCZU3CG	114K 71K LUT6	154K SLC	360	7.6 Mb	252	—	—
XCZU3EG	114K 71K LUT6	154K SLC	360	7.6 Mb	252	—	—
XCZU3TCG	115K 72K LUT6	157K SLC	576	5.1 Mb	124	8 GTH 16.3 Gb/s	Gen3
XCZU3TEG	115K 72K LUT6	157K SLC	576	5.1 Mb	124	8 GTH 16.3 Gb/s	Gen3
XCZU4CG	141K 88K LUT6	192K SLC	728	4.5 Mb	252	16 GTH 16.3 Gb/s	Gen3
XCZU4EG	141K 88K LUT6	192K SLC	728	4.5 Mb	252	16 GTH 16.3 Gb/s	Gen3
XCZU4EV	141K 88K LUT6	192K SLC	728	4.5 Mb	252	16 GTH 16.3 Gb/s	Gen3
XCZU5CG	187K 117K LUT6	256K SLC	1,248	5.1 Mb	252	16 GTH 16.3 Gb/s	Gen3
XCZU5EG	187K 117K LUT6	256K SLC	1,248	5.1 Mb	252	16 GTH 16.3 Gb/s	Gen3
XCZU5EV	187K 117K LUT6	256K SLC	1,248	5.1 Mb	252	16 GTH 16.3 Gb/s	Gen3
XCZU6CG	344K 215K LUT6	469K SLC	1,973	25.1 Mb	328	24 GTH 16.3 Gb/s	—
XCZU6EG	344K 215K LUT6	469K SLC	1,973	25.1 Mb	328	24 GTH 16.3 Gb/s	—
XCZU7CG	368K 230K LUT6	504K SLC	1,728	11 Mb	464	24 GTH 16.3 Gb/s	Gen3
XCZU7EG	368K 230K LUT6	504K SLC	1,728	11 Mb	464	24 GTH 16.3 Gb/s	Gen3
XCZU7EV	368K 230K LUT6	504K SLC	1,728	11 Mb	464	24 GTH 16.3 Gb/s	Gen3
XCZU9CG	438K 274K LUT6	600K SLC	2,520	32.1 Mb	328	24 GTH 16.3 Gb/s	—
XCZU9EG	438K 274K LUT6	600K SLC	2,520	32.1 Mb	328	24 GTH 16.3 Gb/s	—
XCZU11EG	478K 299K LUT6	653K SLC	2,928	21.1 Mb	512	48 GTH/GTY 32.75 Gb/s	Gen3
XCZU15EG	546K 341K LUT6	747K SLC	3,528	26.2 Mb	328	24 GTH 16.3 Gb/s	—
XCZU17EG	677K 423K LUT6	926K SLC	1,590	28 Mb	668	72 GTH/GTY 32.75 Gb/s	Gen3
XCZU19EG	837K 523K LUT6	1143K SLC	1,968	34.6 Mb	668	72 GTH/GTY 32.75 Gb/s	Gen3

Source: AMD Zynq UltraScale+ MPSoC Product Selection Guide, XMP104 (v2.8). Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.