FPGA & adaptive SoC databook · online editionRev. 2026.10

XCZU1EG

AMDZynq UltraScale+ MPSoCSoC

The XCZU1EG is a Zynq UltraScale+ MPSoC FPGA from AMD, built on a 16 nm process. It provides 37,000 LUT6 look-up tables (81,000 system logic cells), about 59,200 LUT4 equivalents, 74,000 flip-flops, 3.8 Mb of block RAM and 216 DSP slices. Its processing system includes four Arm Cortex-A53 cores running at up to 1.5 GHz, a dual Arm Cortex-R5F real-time processor and a Mali-400 MP2 GPU. The processing system adds its own PCIe Gen2 x4, 2x USB 3.0, SATA 3.1, DisplayPort, 4x Gigabit Ethernet, with 4 PS-GTR transceivers at 6 Gb/s. The programmable logic offers up to 180 user I/O pins. It is available in 4 packages, from the A494 (9.5 × 15 mm) to the C784 (23 × 23 mm). Temperature grades: extended, industrial. Designs are built with AMD Vivado.

59.2KLUT4-equivalent
37KLUTs (LUT6)
216DSP slices
3.8 MbBlock RAM
180Max. user I/O
—Transceivers
4× A53Hard processor

Specifications

VendorAMD
FamilyZynq UltraScale+ MPSoC
SeriesUltraScale+
Process16 nm
Configuration memorySRAM
LUT4-equivalent capacity59,200
Look-up tables (LUT6)37,000
System logic cells81,000
Flip-flops74,000
Distributed RAM1,024 Kb
Block RAM3.8 Mb
DSP (DSP slice)216
Clock management tiles3
Max. user I/O180
PL transceiversNone
PCI Express (PL)None
Analog / monitorSystem Monitor
Hard processor4× Arm Cortex-A53 @ 1.5 GHz
PS-GTR transceivers4 × 6 Gb/s
PS connectivityPCIe Gen2 x4, 2x USB 3.0, SATA 3.1, DisplayPort, 4x Gigabit Ethernet
Real-time processorDual Arm Cortex-R5F
GPUMali-400 MP2
Design toolAMD Vivado

Packages

PackageSize (mm)User I/OPS I/OTransceivers
A4949.5 × 1582170—
A48419 × 1982170—
A62521 × 21180170—
C78423 × 23180214—

Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).

Speed and temperature grades

Temperature gradeJunction rangeSpeed grades
Extended (E)0 to 100 °C-1, -2, -2L
Industrial (I)−40 to 100 °C-1, -1L, -2

Alternatives to the XCZU1EG

Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.

DeviceLUT4-eq.Vendor logicDSPBlock RAMMax I/OTransceiversPCIe
XC7Z014SAMD Zynq 700065K 40.6K LUT665K LC1703.8 Mb200——
XC7Z020AMD Zynq 700085.1K 53.2K LUT685K LC2204.9 Mb200——
5CSEA6Altera Cyclone V83.8K 41.9K ALMs110K LE1125.4 Mb288——
A5E 007BAltera Agilex 5 E-Series46.8K 23.4K ALMs69K LE943.5 Mb256——
5CSEA5Altera Cyclone V64.1K 32.1K ALMs85K LE873.9 Mb288——
A3C 065Altera Agilex 344.4K 22.2K ALMs65.5K LE883.3 Mb256——

Compare side by side: XCZU1EG vs XC7Z014S, XCZU1EG vs XC7Z020, XCZU1EG vs 5CSEA6.

XCZU1EG quick facts

How many LUTs does the XCZU1EG have?

The XCZU1EG has 37,000 LUT6 look-up tables, about 59,200 LUT4 equivalents (81,000 system logic cells as published by AMD).

How many DSP blocks does the XCZU1EG have?

The XCZU1EG has 216 DSP slices and 3.8 Mb of block RAM.

Does the XCZU1EG have transceivers?

No, the XCZU1EG has no multi-gigabit transceivers. Its user I/O supports up to 180 pins.

Does the XCZU1EG have a processor?

Yes. It includes a hard 4× Arm Cortex-A53 processor.

What are the alternatives to the XCZU1EG?

Devices of similar size in other families include XC7Z014S (AMD Zynq 7000), XC7Z020 (AMD Zynq 7000), 5CSEA6 (Altera Cyclone V).

Which software is used to design with the XCZU1EG?

Designs for the XCZU1EG are built with AMD Vivado.

Other Zynq UltraScale+ MPSoC devices

DeviceLUT4-eq.Vendor logicDSPBlock RAMMax I/OTransceiversPCIe
XCZU1CG59.2K 37K LUT681K SLC2163.8 Mb180——
XCZU1EG59.2K 37K LUT681K SLC2163.8 Mb180——
XCZU2CG75.2K 47K LUT6103K SLC2405.3 Mb252——
XCZU2EG75.2K 47K LUT6103K SLC2405.3 Mb252——
XCZU3CG114K 71K LUT6154K SLC3607.6 Mb252——
XCZU3EG114K 71K LUT6154K SLC3607.6 Mb252——
XCZU3TCG115K 72K LUT6157K SLC5765.1 Mb1248 GTH 16.3 Gb/sGen3
XCZU3TEG115K 72K LUT6157K SLC5765.1 Mb1248 GTH 16.3 Gb/sGen3
XCZU4CG141K 88K LUT6192K SLC7284.5 Mb25216 GTH 16.3 Gb/sGen3
XCZU4EG141K 88K LUT6192K SLC7284.5 Mb25216 GTH 16.3 Gb/sGen3
XCZU4EV141K 88K LUT6192K SLC7284.5 Mb25216 GTH 16.3 Gb/sGen3
XCZU5CG187K 117K LUT6256K SLC1,2485.1 Mb25216 GTH 16.3 Gb/sGen3
XCZU5EG187K 117K LUT6256K SLC1,2485.1 Mb25216 GTH 16.3 Gb/sGen3
XCZU5EV187K 117K LUT6256K SLC1,2485.1 Mb25216 GTH 16.3 Gb/sGen3
XCZU6CG344K 215K LUT6469K SLC1,97325.1 Mb32824 GTH 16.3 Gb/s—
XCZU6EG344K 215K LUT6469K SLC1,97325.1 Mb32824 GTH 16.3 Gb/s—
XCZU7CG368K 230K LUT6504K SLC1,72811 Mb46424 GTH 16.3 Gb/sGen3
XCZU7EG368K 230K LUT6504K SLC1,72811 Mb46424 GTH 16.3 Gb/sGen3
XCZU7EV368K 230K LUT6504K SLC1,72811 Mb46424 GTH 16.3 Gb/sGen3
XCZU9CG438K 274K LUT6600K SLC2,52032.1 Mb32824 GTH 16.3 Gb/s—
XCZU9EG438K 274K LUT6600K SLC2,52032.1 Mb32824 GTH 16.3 Gb/s—
XCZU11EG478K 299K LUT6653K SLC2,92821.1 Mb51248 GTH/GTY 32.75 Gb/sGen3
XCZU15EG546K 341K LUT6747K SLC3,52826.2 Mb32824 GTH 16.3 Gb/s—
XCZU17EG677K 423K LUT6926K SLC1,59028 Mb66872 GTH/GTY 32.75 Gb/sGen3
XCZU19EG837K 523K LUT61143K SLC1,96834.6 Mb66872 GTH/GTY 32.75 Gb/sGen3

Source: AMD Zynq UltraScale+ MPSoC Product Selection Guide, XMP104 (v2.8). Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.