FPGA & adaptive SoC databook · online editionRev. 2026.10

GW5A-25 vs XC6SLX25

A comparison of the Gowin Arora V GW5A-25 and the AMD Spartan-6 XC6SLX25 using the data from both vendors' selection guides.

Side-by-side specifications

GW5A-25XC6SLX25
Vendor / familyGowin Arora VAMD Spartan-6
LUTs as published23,040 LUT415,032 LUT6
LUT type4-input look-up table6-input look-up table, fracturable into two LUT5 with shared inputs
LUT4 equivalent (approx.)≈23,040≈24,051
CoreScore (SERV cores)——
Vendor logic figure—24,051 LC
DSP28 27×18 DSP blocks38 DSP48A1 slices
Block RAM1 Mb0.9 Mb
Large RAM——
Max. user I/O239266
TransceiversNoneNone
Hard PCI ExpressNoneNone
Hard processorNoneNone
Process22 nm45 nm
Configuration memorySRAMSRAM
Packages143
Design toolGowin EDAAMD ISE Design Suite

Highlighted values are higher. LUT counts are shown as published; the LUT4 equivalent is an approximation to compare different LUT types, see how FPGA vendors count logic. Add up to two more devices to this comparison.

Key differences

Both devices offer similar logic capacity: 23K and 24.1K LUT4 equivalents.

They use different logic architectures: the GW5A-25 is built from LUT4 and the XC6SLX25 from LUT6, so the raw LUT counts (23K vs 15K) are not directly comparable.

For arithmetic, the XC6SLX25 has 38 DSP48A1 slices against 28 27×18 DSP blocks on the GW5A-25.

The GW5A-25 is designed with Gowin EDA; open source: Yosys + nextpnr-himbaechel with Project Apicula and the XC6SLX25 with AMD ISE Design Suite.

Full specifications

See the complete spec sheets with packages and grades: GW5A-25 (Arora V) and XC6SLX25 (Spartan-6).