XC6SLX25
AMDSpartan-6The XC6SLX25 is a Spartan-6 FPGA from AMD, built on a 45 nm process. It provides 15,032 LUT6 look-up tables (24,051 logic cells), 30,064 flip-flops, 0.9 Mb of block RAM and 38 DSP48A1 slices. It offers up to 266 user I/O pins. It is available in 3 packages, from the CSG324 (15 × 15 mm) to the FGG484 (23 × 23 mm). Temperature grades: commercial, industrial. Designs are built with AMD ISE Design Suite.
Specifications
| Vendor | AMD |
|---|---|
| Family | Spartan-6 |
| Series | 6 Series |
| Process | 45 nm |
| Configuration memory | SRAM |
| Look-up tables (LUT6) | 15,032 |
| Logic block | 6-input look-up table, fracturable into two LUT5 with shared inputs |
| LUT4 equivalent (approx.) | ≈24,051 |
| Logic cells | 24,051 |
| Flip-flops | 30,064 |
| Distributed RAM | 229 Kb |
| Block RAM | 0.9 Mb (52 × 18 Kb) |
| DSP (DSP48A1 slice) | 38 |
| Clock management tiles | 2 |
| Max. user I/O | 266 |
|---|---|
| Transceivers | None |
| PCI Express | None |
| Hard memory controller | 2 × MCB (DDR/DDR2/DDR3/LPDDR) |
| Analog / monitor | None |
| Design tool | AMD ISE Design Suite |
Packages
| Package | Size (mm) | Pitch (mm) | User I/O | Transceivers |
|---|---|---|---|---|
| FTG256 | 17 × 17 | 1.0 | 186 | — |
| CSG324 | 15 × 15 | 0.8 | 226 | — |
| FGG484 | 23 × 23 | 1.0 | 266 | — |
Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).
Speed and temperature grades
| Temperature grade | Junction range | Speed grades |
|---|---|---|
| Commercial (C) | 0 to 85 °C | -3, -3N, -2, -1L |
| Industrial (I) | −40 to 100 °C | -3, -3N, -2, -1L |
Alternatives to the XC6SLX25
Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.
| Device | LUTs | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe | CoreScore |
|---|---|---|---|---|---|---|---|---|
| T20Efinix Trion | — 19.7K LEs, LUTs not published | 19.7K LE | 36 | 1 Mb | 230 | — | — | — |
| GW5A-25Gowin Arora V | 23,040 LUT4 | — | 28 | 1 Mb | 239 | — | — | — |
| GW5AR-25Gowin Arora V | 23,040 LUT4 | — | 28 | 1 Mb | 239 | — | — | — |
| LFE5U-25Lattice ECP5 | 24,000 LUT4 | — | 28 | 1 Mb | 197 | — | — | 55 colorlight_5a75b |
| GW2A-18Gowin Arora II | 20,736 LUT4 | — | 48 | 0.8 Mb | 384 | — | — | — |
| GW2AR-18Gowin Arora II | 20,736 LUT4 | — | 48 | 0.8 Mb | 384 | — | — | 45 tang_nano_20k |
Compare side by side: XC6SLX25 vs T20, XC6SLX25 vs GW5A-25, XC6SLX25 vs GW5AR-25, XC6SLX25 vs GW2A-18, XC6SLX25 vs GW2AR-18.
Compare the XC6SLX25 with up to three other FPGAs.
XC6SLX25 quick facts
How many LUTs does the XC6SLX25 have?
The XC6SLX25 has 15,032 LUT6 look-up tables (24,051 logic cells as published by AMD). Logic block: 6-input look-up table, fracturable into two LUT5 with shared inputs.
How many DSP blocks does the XC6SLX25 have?
The XC6SLX25 has 38 DSP48A1 slices and 0.9 Mb of block RAM.
Does the XC6SLX25 have transceivers?
No, the XC6SLX25 has no multi-gigabit transceivers. Its user I/O supports up to 266 pins.
What are the alternatives to the XC6SLX25?
Devices of similar size in other families include T20 (Efinix Trion), GW5A-25 (Gowin Arora V), GW5AR-25 (Gowin Arora V).
Which software is used to design with the XC6SLX25?
Designs for the XC6SLX25 are built with AMD ISE Design Suite.
Other Spartan-6 devices
| Device | LUTs | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe | CoreScore |
|---|---|---|---|---|---|---|---|---|
| XC6SLX4 | 2,400 LUT6 | 3.8K LC | 8 | 0.2 Mb | 132 | — | — | — |
| XC6SLX9 | 5,720 LUT6 | 9.2K LC | 16 | 0.6 Mb | 200 | — | — | — |
| XC6SLX16 | 9,112 LUT6 | 14.6K LC | 32 | 0.6 Mb | 232 | — | — | — |
| XC6SLX25 | 15,032 LUT6 | 24.1K LC | 38 | 0.9 Mb | 266 | — | — | — |
| XC6SLX25T | 15,032 LUT6 | 24.1K LC | 38 | 0.9 Mb | 250 | 2 GTP 3.2 Gb/s | Gen1 | — |
| XC6SLX45 | 27,288 LUT6 | 43.7K LC | 58 | 2 Mb | 358 | — | — | — |
| XC6SLX45T | 27,288 LUT6 | 43.7K LC | 58 | 2 Mb | 296 | 4 GTP 3.2 Gb/s | Gen1 | — |
| XC6SLX75 | 46,648 LUT6 | 74.6K LC | 132 | 3 Mb | 408 | — | — | — |
| XC6SLX75T | 46,648 LUT6 | 74.6K LC | 132 | 3 Mb | 348 | 8 GTP 3.2 Gb/s | Gen1 | — |
| XC6SLX100 | 63,288 LUT6 | 101K LC | 180 | 4.7 Mb | 480 | — | — | — |
| XC6SLX100T | 63,288 LUT6 | 101K LC | 180 | 4.7 Mb | 498 | 8 GTP 3.2 Gb/s | Gen1 | — |
| XC6SLX150 | 92,152 LUT6 | 147K LC | 180 | 4.7 Mb | 576 | — | — | — |
| XC6SLX150T | 92,152 LUT6 | 147K LC | 180 | 4.7 Mb | 540 | 8 GTP 3.2 Gb/s | Gen1 | — |
Source: Spartan-6 Family Overview, DS160 (v2.0). Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.