GW5A-25
GowinArora VThe GW5A-25 is an Arora V FPGA from Gowin, built on a 22 nm process. It provides 23,040 LUT4 look-up tables, 23,040 flip-flops, 1 Mb of block RAM and 28 27×18 DSP blocks. It offers up to 239 user I/O pins. It is available in 14 packages, from the MG121N (6 × 6 mm) to the LQ144 (20 × 20 mm). Designs are built with Gowin EDA.
Specifications
| Vendor | Gowin |
|---|---|
| Family | Arora V |
| Series | GW5A |
| Process | 22 nm |
| Configuration memory | SRAM |
| LUT4-equivalent capacity | 23,040 |
| Look-up tables (LUT4) | 23,040 |
| Flip-flops | 23,040 |
| Distributed RAM | 180 Kb |
| Block RAM | 1 Mb (56 × 18 Kb) |
| DSP (27×18 DSP block) | 28 |
| Max. user I/O | 239 |
|---|---|
| Transceivers | None |
| PCI Express | None |
| Analog / monitor | ADC |
| Design tool | Gowin EDA |
Packages
| Package | Size (mm) | Pitch (mm) | User I/O | Transceivers |
|---|---|---|---|---|
| MG121N | 6 × 6 | 0.5 | 82 | — |
| MG196 | 8 × 8 | 0.5 | 104 | — |
| UG324S | 15 × 15 | 0.8 | 239 | — |
| UG256C | 14 × 14 | 0.8 | 191 | — |
| PG256C | 17 × 17 | 1.0 | 191 | — |
| PG256 | 17 × 17 | 1.0 | 184 | — |
| PG256S | 17 × 17 | 1.0 | 194 | — |
| UG324 | 15 × 15 | 0.8 | 222 | — |
| UG324F | 15 × 15 | 0.8 | 223 | — |
| MG196S | 8 × 8 | 0.5 | 114 | — |
| PG196S | 15 × 15 | 1.0 | 110 | — |
| UG225S | 13 × 13 | 0.8 | 168 | — |
| LQ100 | 14 × 14 | 0.5 | 80 | — |
| LQ144 | 20 × 20 | 0.5 | 109 | — |
Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).
Alternatives to the GW5A-25
Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.
| Device | LUT4-eq. | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe |
|---|---|---|---|---|---|---|---|
| GW3AR-20Gowin Arora III | 23K 23K LUT4 | — | 26 | 1.1 Mb | 238 | — | — |
| LFE5U-25Lattice ECP5 | 24K 24K LUT4 | — | 28 | 1 Mb | 197 | — | — |
| T20Efinix Trion | ≈19.7K 19.7K LEs | 19.7K LE | 36 | 1 Mb | 230 | — | — |
| 5CEA2Altera Cyclone V | 18.9K 9.4K ALMs | 25K LE | 25 | 1.7 Mb | 224 | — | — |
| LFMXO5-25Lattice MachXO5-NX | 22.5K 22.5K LUT4 | 27K LC | 20 | 1.4 Mb | 305 | — | — |
| LFD2NX-25Lattice Certus-NX | 20.8K 20.8K LUT4 | 25K LC | 20 | 1.4 Mb | 311 | — | — |
Compare side by side: GW5A-25 vs GW3AR-20, GW5A-25 vs LFE5U-25, GW5A-25 vs T20.
GW5A-25 quick facts
How many LUTs does the GW5A-25 have?
The GW5A-25 has 23,040 LUT4 look-up tables, about 23,040 LUT4 equivalents.
How many DSP blocks does the GW5A-25 have?
The GW5A-25 has 28 27×18 DSP blocks and 1 Mb of block RAM.
Does the GW5A-25 have transceivers?
No, the GW5A-25 has no multi-gigabit transceivers. Its user I/O supports up to 239 pins.
What are the alternatives to the GW5A-25?
Devices of similar size in other families include GW3AR-20 (Gowin Arora III), LFE5U-25 (Lattice ECP5), T20 (Efinix Trion).
Which software is used to design with the GW5A-25?
Designs for the GW5A-25 are built with Gowin EDA.
Other Arora V devices
| Device | LUT4-eq. | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe |
|---|---|---|---|---|---|---|---|
| GW5AT-15 | 15.1K 15.1K LUT4 | — | 28 | 0.6 Mb | 53 | 4 SERDES 12.5 Gb/s | Gen3 |
| GW5ART-15 | 15.1K 15.1K LUT4 | — | 28 | 0.6 Mb | 53 | 4 SERDES 12.5 Gb/s | Gen3 |
| GW5A-25 | 23K 23K LUT4 | — | 28 | 1 Mb | 239 | — | — |
| GW5AR-25 | 23K 23K LUT4 | — | 28 | 1 Mb | 239 | — | — |
| GW5AS-25 | 23K 23K LUT4 | — | 28 | 1 Mb | 239 | — | — |
| GW5A-60 | 59.9K 59.9K LUT4 | — | 118 | 2.1 Mb | 320 | — | — |
| GW5AT-60 | 59.9K 59.9K LUT4 | — | 118 | 2.1 Mb | 320 | 4 SERDES 12.5 Gb/s | Gen3 |
| GW5AT-75 | 86.7K 86.7K LUT4 | — | 213 | 4.5 Mb | 312 | 8 SERDES 12.5 Gb/s | Gen3 |
| GW5A-138 | 138K 138K LUT4 | — | 298 | 6 Mb | 312 | — | — |
| GW5AT-138 | 138K 138K LUT4 | — | 298 | 6 Mb | 312 | 8 SERDES 12.5 Gb/s | Gen3 |
| GW5AS-138 | 138K 138K LUT4 | — | 298 | 6 Mb | 312 | — | — |
| GW5AST-138 | 138K 138K LUT4 | — | 298 | 6 Mb | 376 | 8 SERDES 12.5 Gb/s | Gen3 |
Source: Gowin Arora V product page, retrieved 2026-10-24. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.