FPGA & adaptive SoC databook · online editionRev. 2026.10

LFMXO5-30TD vs XC6SLX25T

A comparison of the Lattice MachXO5-NX LFMXO5-30TD and the AMD Spartan-6 XC6SLX25T using the data from both vendors' selection guides.

Side-by-side specifications

LFMXO5-30TDXC6SLX25T
Vendor / familyLattice MachXO5-NXAMD Spartan-6
LUTs as published25,000 LUT415,032 LUT6
LUT type4-input look-up table6-input look-up table, fracturable into two LUT5 with shared inputs
LUT4 equivalent (approx.)≈25,000≈24,051
CoreScore (SERV cores)——
Vendor logic figure30,000 LC24,051 LC
DSP48 18×18 multipliers38 DSP48A1 slices
Block RAM0.8 Mb0.9 Mb
Large RAM0.5 Mb—
Max. user I/O368250
Transceivers1 × SERDES2 × GTP 3.2 Gb/s
Hard PCI ExpressGen2Gen1 x1
Hard processorNoneNone
Process28 nm45 nm
Configuration memoryInternal flashSRAM
Packages32
Design toolLattice RadiantAMD ISE Design Suite

Highlighted values are higher. LUT counts are shown as published; the LUT4 equivalent is an approximation to compare different LUT types, see how FPGA vendors count logic. Add up to two more devices to this comparison.

Key differences

Both devices offer similar logic capacity: 25K and 24.1K LUT4 equivalents.

They use different logic architectures: the LFMXO5-30TD is built from LUT4 and the XC6SLX25T from LUT6, so the raw LUT counts (25K vs 15K) are not directly comparable.

For arithmetic, the LFMXO5-30TD has 48 18×18 multipliers against 38 DSP48A1 slices on the XC6SLX25T.

The LFMXO5-30TD has more on-chip memory (1.3 Mb vs 0.9 Mb).

Both have transceivers: 1 at up to 0 Gb/s on the LFMXO5-30TD and 2 at up to 3.2 Gb/s on the XC6SLX25T.

Configuration memory: internal flash on the LFMXO5-30TD, sram on the XC6SLX25T.

The LFMXO5-30TD is designed with Lattice Radiant and the XC6SLX25T with AMD ISE Design Suite.

Full specifications

See the complete spec sheets with packages and grades: LFMXO5-30TD (MachXO5-NX) and XC6SLX25T (Spartan-6).