FPGA & adaptive SoC databook · online editionRev. 2026.10

TX 850 vs XCZU19EG

A comparison of the Altera Stratix 10 TX TX 850 and the AMD Zynq UltraScale+ MPSoC XCZU19EG using the data from both vendors' selection guides.

Side-by-side specifications

TX 850XCZU19EG
Vendor / familyAltera Stratix 10 TXAMD Zynq UltraScale+ MPSoC
LUTs as published284,960 ALMs523,000 LUT6
LUT typeadaptive logic module: fracturable 8-input LUT (one 6-input or two independent 4-input functions)6-input look-up table, fracturable into two LUT5 with shared inputs
LUT4 equivalent (approx.)≈569,920≈836,800
CoreScore (SERV cores)——
Vendor logic figure841,000 LE1,143,000 SLC
DSP2,016 variable-precision DSP blocks1,968 DSP slices
Block RAM68 Mb34.6 Mb
Large RAM—36 Mb
Max. user I/O440668
Transceivers48 × GXE 57.8 Gb/s, 16 × GXT 28.3 Gb/s, 8 × GX 17.4 Gb/s44 × GTH 16.3 Gb/s, 28 × GTY 32.75 Gb/s
Hard PCI ExpressGen3 x16Gen3 x16
Hard processor4× Arm Cortex-A53 (optional)4× Arm Cortex-A53
Process14 nm16 nm
Configuration memorySRAMSRAM
Packages24
Design toolAltera Quartus PrimeAMD Vivado

Highlighted values are higher. LUT counts are shown as published; the LUT4 equivalent is an approximation to compare different LUT types, see how FPGA vendors count logic. Add up to two more devices to this comparison.

Key differences

The XCZU19EG has about 47% more logic capacity (837K vs 570K LUT4 equivalents).

They use different logic architectures: the TX 850 is built from ALMs and the XCZU19EG from LUT6, so the raw LUT counts (285K vs 523K) are not directly comparable.

For arithmetic, the TX 850 has 2,016 variable-precision DSP blocks against 1,968 DSP slices on the XCZU19EG.

Both have transceivers: 72 at up to 57.8 Gb/s on the TX 850 and 72 at up to 32.75 Gb/s on the XCZU19EG.

The TX 850 is designed with Altera Quartus Prime and the XCZU19EG with AMD Vivado.

Full specifications

See the complete spec sheets with packages and grades: TX 850 (Stratix 10 TX) and XCZU19EG (Zynq UltraScale+ MPSoC).