LFMNX-50
LatticeMach-NXThe LFMNX-50 is a Mach-NX FPGA from Lattice, built on a 28 nm process. It provides 7,000 LUT4 look-up tables (8,400 logic cells), 0.4 Mb of block RAM, with no hard multipliers. It offers up to 378 user I/O pins. It is available in 2 packages, from the fcCSP256 (14 × 14 mm) to the fcBGA484 (19 × 19 mm). Temperature grades: commercial, industrial. Designs are built with Lattice Radiant.
Specifications
| Vendor | Lattice |
|---|---|
| Family | Mach-NX |
| Series | Nexus |
| Process | 28 nm |
| Configuration memory | Internal flash |
| Look-up tables (LUT4) | 7,000 |
| Logic block | 4-input look-up table |
| LUT note | Derived from logic cells ÷ 1.2 (Lattice definition for Nexus devices) |
| Logic cells | 8,400 |
| Distributed RAM | 73 Kb |
| Block RAM | 0.4 Mb |
| User flash memory | 2,669 Kb |
| DSP (18×18 multiplier) | None |
| Max. user I/O | 378 |
|---|---|
| Transceivers | None |
| PCI Express | None |
| Analog / monitor | None |
| Design tool | Lattice Radiant |
Packages
| Package | Size (mm) | Pitch (mm) | User I/O | Transceivers |
|---|---|---|---|---|
| fcCSP256 | 14 × 14 | 0.8 | 188 | — |
| fcBGA484 | 19 × 19 | 0.8 | 378 | — |
Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).
Speed and temperature grades
| Temperature grade | Junction range | Speed grades |
|---|---|---|
| Commercial (C) | 0 to 85 °C | — |
| Industrial (I) | −40 to 100 °C | — |
Alternatives to the LFMNX-50
Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.
| Device | LUTs | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe | CoreScore |
|---|---|---|---|---|---|---|---|---|
| LCMXO3L-6900Lattice MachXO3 | 6,900 LUT4 | — | — | 0.2 Mb | 335 | — | — | — |
| LCMXO3LF-6900Lattice MachXO3 | 6,900 LUT4 | — | — | 0.2 Mb | 335 | — | — | — |
| LCMXO2-7000Lattice MachXO2 | 6,864 LUT4 | — | — | 0.2 Mb | 334 | — | — | — |
| LFMXO4-080Lattice MachXO4 | 6,864 LUT4 | 8.3K LC | — | 0.2 Mb | 333 | — | — | — |
| LFMXO4D-080Lattice MachXO4 | 6,864 LUT4 | 8.3K LC | — | 0.2 Mb | 333 | — | — | — |
| LFMXO4D-110Lattice MachXO4 | 9,400 LUT4 | 11.3K LC | — | 0.4 Mb | 381 | — | — | — |
Compare side by side: LFMNX-50 vs LCMXO3L-6900, LFMNX-50 vs LCMXO3LF-6900, LFMNX-50 vs LCMXO2-7000.
Compare the LFMNX-50 with up to three other FPGAs.
LFMNX-50 quick facts
How many LUTs does the LFMNX-50 have?
The LFMNX-50 has 7,000 LUT4 look-up tables (8,400 logic cells as published by Lattice). Logic block: 4-input look-up table.
How many DSP blocks does the LFMNX-50 have?
The LFMNX-50 has no 18×18 multipliers and 0.4 Mb of block RAM.
Does the LFMNX-50 have transceivers?
No, the LFMNX-50 has no multi-gigabit transceivers. Its user I/O supports up to 378 pins.
What are the alternatives to the LFMNX-50?
Devices of similar size in other families include LCMXO3L-6900 (Lattice MachXO3), LCMXO3LF-6900 (Lattice MachXO3), LCMXO2-7000 (Lattice MachXO2).
Which software is used to design with the LFMNX-50?
Designs for the LFMNX-50 are built with Lattice Radiant.
Other Mach-NX devices
| Device | LUTs | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe | CoreScore |
|---|---|---|---|---|---|---|---|---|
| LFMNX-50 | 7,000 LUT4 | 8.4K LC | — | 0.4 Mb | 378 | — | — | — |
Source: Lattice Mach-NX product page, Family Table, retrieved 2026-10-26. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.