5CSEA5
AlteraCyclone VSoCThe 5CSEA5 is a Cyclone V SoC FPGA from Altera, built on a 28 nm process. It provides 32,070 adaptive logic modules (ALMs) (85,000 logic elements (LEs)), about 64,140 LUT4 equivalents, 128,300 flip-flops, 3.9 Mb of block RAM and 87 variable-precision DSP blocks. Its processing system includes two Arm Cortex-A9 cores. The programmable logic offers up to 288 user I/O pins. It is available in 3 packages, from the U484 (19 × 19 mm) to the F896 (31 × 31 mm). Designs are built with Altera Quartus Prime.
Specifications
| Vendor | Altera |
|---|---|
| Family | Cyclone V |
| Series | Cyclone |
| Process | 28 nm |
| Configuration memory | SRAM |
| LUT4-equivalent capacity | 64,140 |
| Adaptive logic modules (ALMs) | 32,070 |
| LUT note | Adaptive logic modules (ALMs): fracturable 8-input LUTs; each ALM can implement two 4-input functions |
| Logic elements (LEs) | 85,000 |
| Flip-flops | 128,300 |
| Distributed RAM | 480 Kb |
| Block RAM | 3.9 Mb (397 × 10 Kb) |
| DSP (variable-precision DSP block) | 87 |
| Max. user I/O | 288 |
|---|---|
| PL transceivers | None |
| PCI Express (PL) | None |
| Analog / monitor | None |
| Hard processor | 2× Arm Cortex-A9 |
| Design tool | Altera Quartus Prime |
Packages
| Package | Size (mm) | Pitch (mm) | User I/O | PS I/O | Transceivers |
|---|---|---|---|---|---|
| U484 | 19 × 19 | 0.8 | 66 | 151 | — |
| U672 | 23 × 23 | 0.8 | 145 | 181 | — |
| F896 | 31 × 31 | 1.0 | 288 | 181 | — |
Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).
Alternatives to the 5CSEA5
Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.
| Device | LUT4-eq. | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe |
|---|---|---|---|---|---|---|---|
| A5E 007BAltera Agilex 5 E-Series | 46.8K 23.4K ALMs | 69K LE | 94 | 3.5 Mb | 256 | — | — |
| A3C 065Altera Agilex 3 | 44.4K 22.2K ALMs | 65.5K LE | 88 | 3.3 Mb | 256 | — | — |
| XC7Z014SAMD Zynq 7000 | 65K 40.6K LUT6 | 65K LC | 170 | 3.8 Mb | 200 | — | — |
| A5E 005BAltera Agilex 5 E-Series | 34.2K 17.1K ALMs | 50.4K LE | 65 | 2.5 Mb | 256 | — | — |
| A3C 050Altera Agilex 3 | 32K 16K ALMs | 47.2K LE | 65 | 2.4 Mb | 256 | — | — |
| XCVE2002AMD Versal AI Edge | 32K 20K LUT6 | 43.8K SLC | 90 | 0.8 Mb | 216 | — | — |
Compare side by side: 5CSEA5 vs A5E 007B, 5CSEA5 vs A3C 065, 5CSEA5 vs XC7Z014S.
5CSEA5 quick facts
How many LUTs does the 5CSEA5 have?
The 5CSEA5 has 32,070 adaptive logic modules (ALMs), about 64,140 LUT4 equivalents (85,000 logic elements (les) as published by Altera).
How many DSP blocks does the 5CSEA5 have?
The 5CSEA5 has 87 variable-precision DSP blocks and 3.9 Mb of block RAM.
Does the 5CSEA5 have transceivers?
No, the 5CSEA5 has no multi-gigabit transceivers. Its user I/O supports up to 288 pins.
Does the 5CSEA5 have a processor?
Yes. It includes a hard 2× Arm Cortex-A9 processor.
What are the alternatives to the 5CSEA5?
Devices of similar size in other families include A5E 007B (Altera Agilex 5 E-Series), A3C 065 (Altera Agilex 3), XC7Z014S (AMD Zynq 7000).
Which software is used to design with the 5CSEA5?
Designs for the 5CSEA5 are built with Altera Quartus Prime.
Other Cyclone V devices
| Device | LUT4-eq. | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe |
|---|---|---|---|---|---|---|---|
| 5CEA2 | 18.9K 9.4K ALMs | 25K LE | 25 | 1.7 Mb | 224 | — | — |
| 5CSEA2 | 18.9K 9.4K ALMs | 25K LE | 36 | 1.4 Mb | 145 | — | — |
| 5CSXC2 | 18.9K 9.4K ALMs | 25K LE | 36 | 1.4 Mb | 145 | 6 XCVR 3.125 Gb/s | Gen1 |
| 5CGXC3 | 26.9K 13.5K ALMs | 36K LE | 57 | 1.3 Mb | 208 | 3 XCVR 3.125 Gb/s | Gen1 |
| 5CSEA4 | 31.8K 15.9K ALMs | 40K LE | 84 | 2.6 Mb | 145 | — | — |
| 5CSXC4 | 31.8K 15.9K ALMs | 40K LE | 84 | 2.6 Mb | 145 | 6 XCVR 3.125 Gb/s | Gen1 |
| 5CEA4 | 37K 18.5K ALMs | 49K LE | 66 | 3 Mb | 224 | — | — |
| 5CGXC4 | 37.7K 18.9K ALMs | 50K LE | 70 | 2.4 Mb | 336 | 6 XCVR 3.125 Gb/s | Gen1 |
| 5CEA5 | 58.2K 29.1K ALMs | 77K LE | 150 | 4.4 Mb | 240 | — | — |
| 5CGXC5 | 58.2K 29.1K ALMs | 77K LE | 150 | 4.4 Mb | 336 | 6 XCVR 3.125 Gb/s | Gen1 |
| 5CGTD5 | 58.2K 29.1K ALMs | 77K LE | 150 | 4.4 Mb | 336 | 6 XCVR 6.144 Gb/s | Gen2 |
| 5CSEA5 | 64.1K 32.1K ALMs | 85K LE | 87 | 3.9 Mb | 288 | — | — |
| 5CSXC5 | 64.1K 32.1K ALMs | 85K LE | 87 | 3.9 Mb | 288 | 9 XCVR 3.125 Gb/s | Gen1 |
| 5CSTD5 | 64.1K 32.1K ALMs | 85K LE | 87 | 3.9 Mb | 288 | 9 XCVR 6.144 Gb/s | Gen2 |
| 5CSEA6 | 83.8K 41.9K ALMs | 110K LE | 112 | 5.4 Mb | 288 | — | — |
| 5CSXC6 | 83.8K 41.9K ALMs | 110K LE | 112 | 5.4 Mb | 288 | 9 XCVR 3.125 Gb/s | Gen1 |
| 5CSTD6 | 83.8K 41.9K ALMs | 110K LE | 112 | 5.4 Mb | 288 | 9 XCVR 6.144 Gb/s | Gen2 |
| 5CEA7 | 113K 56.5K ALMs | 150K LE | 156 | 6.7 Mb | 480 | — | — |
| 5CGXC7 | 113K 56.5K ALMs | 150K LE | 156 | 6.7 Mb | 480 | 9 XCVR 3.125 Gb/s | Gen1 |
| 5CGTD7 | 113K 56.5K ALMs | 150K LE | 156 | 6.7 Mb | 480 | 9 XCVR 6.144 Gb/s | Gen2 |
| 5CEA9 | 227K 114K ALMs | 301K LE | 342 | 11.9 Mb | 480 | — | — |
| 5CGXC9 | 227K 114K ALMs | 301K LE | 342 | 11.9 Mb | 560 | 12 XCVR 3.125 Gb/s | Gen1 |
| 5CGTD9 | 227K 114K ALMs | 301K LE | 342 | 11.9 Mb | 560 | 12 XCVR 6.144 Gb/s | Gen2 |
Source: Altera Cyclone V FPGA and SoC FPGA Product Table, 2025.09.24. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.