5CGXC3
AlteraCyclone VSoCThe 5CGXC3 is a Cyclone V FPGA from Altera, built on a 28 nm process. It provides 13,460 adaptive logic modules (ALMs) (36,000 logic elements (LEs)), about 26,920 LUT4 equivalents, 53,840 flip-flops, 1.3 Mb of block RAM and 57 variable-precision DSP blocks. It offers up to 208 user I/O pins and 3 XCVR transceivers at up to 3.125 Gb/s, with hard PCI Express Gen1 blocks. It is available in 3 packages, from the U324 (15 × 15 mm) to the F484 (23 × 23 mm). Designs are built with Altera Quartus Prime.
Specifications
| Vendor | Altera |
|---|---|
| Family | Cyclone V |
| Series | Cyclone |
| Process | 28 nm |
| Configuration memory | SRAM |
| LUT4-equivalent capacity | 26,920 |
| Adaptive logic modules (ALMs) | 13,460 |
| LUT note | Adaptive logic modules (ALMs): fracturable 8-input LUTs; each ALM can implement two 4-input functions |
| Logic elements (LEs) | 36,000 |
| Flip-flops | 53,840 |
| Distributed RAM | 182 Kb |
| Block RAM | 1.3 Mb (135 × 10 Kb) |
| DSP (variable-precision DSP block) | 57 |
| Max. user I/O | 208 |
|---|---|
| XCVR transceivers | 3 × 3.125 Gb/s |
| PCI Express | Gen1 |
| Analog / monitor | None |
| Design tool | Altera Quartus Prime |
Packages
| Package | Size (mm) | Pitch (mm) | User I/O | Transceivers |
|---|---|---|---|---|
| U324 | 15 × 15 | 0.8 | 144 | 3 |
| U484 | 19 × 19 | 0.8 | 208 | 3 |
| F484 | 23 × 23 | 1.0 | 208 | 3 |
Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).
Alternatives to the 5CGXC3
Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.
| Device | LUT4-eq. | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe |
|---|---|---|---|---|---|---|---|
| EP4CGX30Altera Cyclone IV | 29K 29K LUT4 | 29K LE | 80 | 1.1 Mb | 290 | 4 XCVR 3.125 Gb/s | Gen2 |
| XC7A25TAMD Artix-7 | 23.4K 14.6K LUT6 | 23.4K LC | 80 | 1.6 Mb | 150 | 4 GTP 6.6 Gb/s | Gen2 |
| XC7A35TAMD Artix-7 | 33.3K 20.8K LUT6 | 33.3K LC | 90 | 1.8 Mb | 250 | 4 GTP 6.6 Gb/s | Gen2 |
| EP4CGX22Altera Cyclone IV | 21K 21K LUT4 | 21K LE | 40 | 0.7 Mb | 150 | 4 XCVR 3.125 Gb/s | Gen2 |
| LFMXO5-30TDLattice MachXO5-NX | 25K 25K LUT4 | 30K LC | 48 | 0.8 Mb | 368 | 1 SERDES | Gen2 |
| XC7A15TAMD Artix-7 | 16.6K 10.4K LUT6 | 16.6K LC | 45 | 0.9 Mb | 250 | 4 GTP 6.6 Gb/s | Gen2 |
Compare side by side: 5CGXC3 vs EP4CGX30, 5CGXC3 vs XC7A25T, 5CGXC3 vs XC7A35T, 5CGXC3 vs XC7A15T.
5CGXC3 quick facts
How many LUTs does the 5CGXC3 have?
The 5CGXC3 has 13,460 adaptive logic modules (ALMs), about 26,920 LUT4 equivalents (36,000 logic elements (les) as published by Altera).
How many DSP blocks does the 5CGXC3 have?
The 5CGXC3 has 57 variable-precision DSP blocks and 1.3 Mb of block RAM.
Does the 5CGXC3 have transceivers?
Yes, 3 XCVR transceivers at up to 3.125 Gb/s.
What are the alternatives to the 5CGXC3?
Devices of similar size in other families include EP4CGX30 (Altera Cyclone IV), XC7A25T (AMD Artix-7), XC7A35T (AMD Artix-7).
Which software is used to design with the 5CGXC3?
Designs for the 5CGXC3 are built with Altera Quartus Prime.
Other Cyclone V devices
| Device | LUT4-eq. | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe |
|---|---|---|---|---|---|---|---|
| 5CEA2 | 18.9K 9.4K ALMs | 25K LE | 25 | 1.7 Mb | 224 | — | — |
| 5CSEA2 | 18.9K 9.4K ALMs | 25K LE | 36 | 1.4 Mb | 145 | — | — |
| 5CSXC2 | 18.9K 9.4K ALMs | 25K LE | 36 | 1.4 Mb | 145 | 6 XCVR 3.125 Gb/s | Gen1 |
| 5CGXC3 | 26.9K 13.5K ALMs | 36K LE | 57 | 1.3 Mb | 208 | 3 XCVR 3.125 Gb/s | Gen1 |
| 5CSEA4 | 31.8K 15.9K ALMs | 40K LE | 84 | 2.6 Mb | 145 | — | — |
| 5CSXC4 | 31.8K 15.9K ALMs | 40K LE | 84 | 2.6 Mb | 145 | 6 XCVR 3.125 Gb/s | Gen1 |
| 5CEA4 | 37K 18.5K ALMs | 49K LE | 66 | 3 Mb | 224 | — | — |
| 5CGXC4 | 37.7K 18.9K ALMs | 50K LE | 70 | 2.4 Mb | 336 | 6 XCVR 3.125 Gb/s | Gen1 |
| 5CEA5 | 58.2K 29.1K ALMs | 77K LE | 150 | 4.4 Mb | 240 | — | — |
| 5CGXC5 | 58.2K 29.1K ALMs | 77K LE | 150 | 4.4 Mb | 336 | 6 XCVR 3.125 Gb/s | Gen1 |
| 5CGTD5 | 58.2K 29.1K ALMs | 77K LE | 150 | 4.4 Mb | 336 | 6 XCVR 6.144 Gb/s | Gen2 |
| 5CSEA5 | 64.1K 32.1K ALMs | 85K LE | 87 | 3.9 Mb | 288 | — | — |
| 5CSXC5 | 64.1K 32.1K ALMs | 85K LE | 87 | 3.9 Mb | 288 | 9 XCVR 3.125 Gb/s | Gen1 |
| 5CSTD5 | 64.1K 32.1K ALMs | 85K LE | 87 | 3.9 Mb | 288 | 9 XCVR 6.144 Gb/s | Gen2 |
| 5CSEA6 | 83.8K 41.9K ALMs | 110K LE | 112 | 5.4 Mb | 288 | — | — |
| 5CSXC6 | 83.8K 41.9K ALMs | 110K LE | 112 | 5.4 Mb | 288 | 9 XCVR 3.125 Gb/s | Gen1 |
| 5CSTD6 | 83.8K 41.9K ALMs | 110K LE | 112 | 5.4 Mb | 288 | 9 XCVR 6.144 Gb/s | Gen2 |
| 5CEA7 | 113K 56.5K ALMs | 150K LE | 156 | 6.7 Mb | 480 | — | — |
| 5CGXC7 | 113K 56.5K ALMs | 150K LE | 156 | 6.7 Mb | 480 | 9 XCVR 3.125 Gb/s | Gen1 |
| 5CGTD7 | 113K 56.5K ALMs | 150K LE | 156 | 6.7 Mb | 480 | 9 XCVR 6.144 Gb/s | Gen2 |
| 5CEA9 | 227K 114K ALMs | 301K LE | 342 | 11.9 Mb | 480 | — | — |
| 5CGXC9 | 227K 114K ALMs | 301K LE | 342 | 11.9 Mb | 560 | 12 XCVR 3.125 Gb/s | Gen1 |
| 5CGTD9 | 227K 114K ALMs | 301K LE | 342 | 11.9 Mb | 560 | 12 XCVR 6.144 Gb/s | Gen2 |
Source: Altera Cyclone V FPGA and SoC FPGA Product Table, 2025.09.24. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.