MX 1650

AlteraStratix 10 MX

The MX 1650 is a Stratix 10 MX FPGA from Altera, built on a 14 nm process. It provides 569,200 adaptive logic modules (ALMs) (1,679,000 logic elements (LEs)), 2,276,800 flip-flops, 120 Mb of block RAM and 3,326 variable-precision DSP blocks. It offers up to 656 user I/O pins and 96 GXT/GX transceivers at up to 28.3 Gb/s, with hard PCI Express Gen3 x16 blocks. It comes in a single package, the F2597 (52.5 × 52.5 mm). Designs are built with Altera Quartus Prime.

569,200ALMs

3,326variable-precision DSP blocks

120 MbBlock RAM

656Max. user I/O

96Transceivers (28.3 Gb/s)

Specifications

Vendor	Altera
Family	Stratix 10 MX
Series	Stratix
Process	14 nm
Configuration memory	SRAM
Adaptive logic modules (ALMs)	569,200
Logic block	adaptive logic module: fracturable 8-input LUT (one 6-input or two independent 4-input functions)
LUT note	Adaptive logic modules (ALMs): fracturable 8-input LUTs; each ALM can implement two 4-input functions
LUT4 equivalent (approx.)	≈1,138,400
Logic elements (LEs)	1,679,000
Flip-flops	2,276,800
Distributed RAM	9,216 Kb
Block RAM	120 Mb (6162 × 20 Kb)
HBM	16 GB
DSP (variable-precision DSP block)	3,326

Max. user I/O	656
Differential pairs	312
GXT transceivers	64 × 28.3 Gb/s
GX transceivers	32 × 17.4 Gb/s
PCI Express	4× Gen3 x16
100G Ethernet MAC	4
Analog / monitor	None
Design tool	Altera Quartus Prime

Packages

Package	Size (mm)	Pitch (mm)	User I/O	Transceivers
F2597	52.5 × 52.5	1.0	656	96

Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).

Alternatives to the MX 1650

Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.

Device	LUTs	Vendor logic	DSP	Block RAM	Max I/O	Transceivers	PCIe	CoreScore
GX 1650Altera Stratix 10 GX/SX	550,540 ALMs	1624K LE	3,145	114 Mb	704	96 XCVR/XCVR 28.3 Gb/s	Gen3	—
GX 2100Altera Stratix 10 GX/SX	679,680 ALMs	2005K LE	3,744	127 Mb	704	96 XCVR/XCVR 28.3 Gb/s	Gen3	—
TX 1650Altera Stratix 10 TX	569,200 ALMs	1679K LE	3,326	120 Mb	440	96 GXE/GXT/GX 57.8 Gb/s	Gen3	—
DX 2100Altera Stratix 10 DX	702,720 ALMs	2073K LE	3,960	134 Mb	612	84 GXP/GXE 57.8 Gb/s	Gen4	—
TX 2100Altera Stratix 10 TX	702,720 ALMs	2073K LE	3,960	134 Mb	440	96 GXE/GXT/GX 57.8 Gb/s	Gen3	—
XCVU5PAMD Virtex UltraScale+	601,000 LUT6	1314K SLC	3,474	36 Mb	832	80 GTY 32.75 Gb/s	Gen3	—

Compare side by side: MX 1650 vs GX 1650, MX 1650 vs GX 2100, MX 1650 vs TX 1650, MX 1650 vs XCVU5P.

Compare the MX 1650 with up to three other FPGAs.

MX 1650 quick facts

How many LUTs does the MX 1650 have?

The MX 1650 has 569,200 adaptive logic modules (ALMs) (1,679,000 logic elements (les) as published by Altera). Logic block: adaptive logic module: fracturable 8-input LUT (one 6-input or two independent 4-input functions).

How many DSP blocks does the MX 1650 have?

The MX 1650 has 3,326 variable-precision DSP blocks and 120 Mb of block RAM.

Does the MX 1650 have transceivers?

Yes, 96 GXT/GX transceivers at up to 28.3 Gb/s.

What are the alternatives to the MX 1650?

Devices of similar size in other families include GX 1650 (Altera Stratix 10 GX/SX), GX 2100 (Altera Stratix 10 GX/SX), TX 1650 (Altera Stratix 10 TX).

Which software is used to design with the MX 1650?

Designs for the MX 1650 are built with Altera Quartus Prime.

Other Stratix 10 MX devices

Device	LUTs	Vendor logic	DSP	Block RAM	Max I/O	Transceivers	PCIe	CoreScore
MX 1650	569,200 ALMs	1679K LE	3,326	120 Mb	656	96 GXT/GX 28.3 Gb/s	Gen3	—
MX 1650 E-tile	569,200 ALMs	1679K LE	3,326	120 Mb	584	96 GXE/GXT/GX 57.8 Gb/s	Gen3	—
MX 2100	702,720 ALMs	2073K LE	3,960	134 Mb	656	96 GXT/GX 28.3 Gb/s	Gen3	—

Source: Altera Stratix 10 MX FPGA Product Table, retrieved 2026-10-26. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.