GX 2100
AlteraStratix 10 GX/SXSoCThe GX 2100 is a Stratix 10 GX/SX FPGA from Altera, built on a 14 nm process. It provides 679,680 adaptive logic modules (ALMs) (2,005,000 logic elements (LEs)), about 1,359,360 LUT4 equivalents, 127 Mb of block RAM and 3,744 variable-precision DSP blocks. It offers up to 704 user I/O pins and 96 XCVR/XCVR transceivers at up to 28.3 Gb/s, with hard PCI Express Gen3 x16 blocks. It is available in 2 packages, from the F1760 (42.5 × 42.5 mm) to the F2397 (50 × 50 mm). Designs are built with Altera Quartus Prime.
Specifications
| Vendor | Altera |
|---|---|
| Family | Stratix 10 GX/SX |
| Series | Stratix |
| Process | 14 nm |
| Configuration memory | SRAM |
| LUT4-equivalent capacity | 1,359,360 |
| Adaptive logic modules (ALMs) | 679,680 |
| LUT note | Adaptive logic modules (ALMs): fracturable 8-input LUTs; each ALM can implement two 4-input functions |
| Logic elements (LEs) | 2,005,000 |
| Distributed RAM | 11,264 Kb |
| Block RAM | 127 Mb (6501 × 20 Kb) |
| DSP (variable-precision DSP block) | 3,744 |
| Max. user I/O | 704 |
|---|---|
| XCVR transceivers | 64 × 28.3 Gb/s |
| XCVR transceivers | 32 × 17.4 Gb/s |
| PCI Express | 4× Gen3 x16 |
| Analog / monitor | None |
| Design tool | Altera Quartus Prime |
Packages
| Package | Size (mm) | Pitch (mm) | User I/O | Transceivers |
|---|---|---|---|---|
| F1760 | 42.5 × 42.5 | 1.0 | 688 | 48 |
| F2397 | 50 × 50 | 1.0 | 704 | 96 |
Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).
Alternatives to the GX 2100
Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.
| Device | LUT4-eq. | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe |
|---|---|---|---|---|---|---|---|
| XCVU5PAMD Virtex UltraScale+ | 962K 601K LUT6 | 1314K SLC | 3,474 | 36 Mb | 832 | 80 GTY 32.75 Gb/s | Gen3 |
| XCVU7PAMD Virtex UltraScale+ | 1261K 788K LUT6 | 1724K SLC | 4,560 | 50.6 Mb | 832 | 80 GTY 32.75 Gb/s | Gen3 |
| XC7VX1140TAMD Virtex-7 | 1139K 712K LUT6 | 1139K LC | 3,360 | 66.1 Mb | 1,100 | 96 GTH 13.1 Gb/s | Gen3 |
| XCVU35PAMD Virtex UltraScale+ HBM | 1395K 872K LUT6 | 1907K SLC | 5,952 | 47.3 Mb | 416 | 64 GTY 32.75 Gb/s | Gen3 |
| XCVU45PAMD Virtex UltraScale+ HBM | 1395K 872K LUT6 | 1907K SLC | 5,952 | 47.3 Mb | 416 | 64 GTY 32.75 Gb/s | Gen3 |
| XC7VX980TAMD Virtex-7 | 979K 612K LUT6 | 979K LC | 3,600 | 52.7 Mb | 900 | 72 GTH 13.1 Gb/s | Gen3 |
Compare side by side: GX 2100 vs XCVU5P, GX 2100 vs XCVU7P, GX 2100 vs XC7VX1140T.
GX 2100 quick facts
How many LUTs does the GX 2100 have?
The GX 2100 has 679,680 adaptive logic modules (ALMs), about 1,359,360 LUT4 equivalents (2,005,000 logic elements (les) as published by Altera).
How many DSP blocks does the GX 2100 have?
The GX 2100 has 3,744 variable-precision DSP blocks and 127 Mb of block RAM.
Does the GX 2100 have transceivers?
Yes, 96 XCVR/XCVR transceivers at up to 28.3 Gb/s.
What are the alternatives to the GX 2100?
Devices of similar size in other families include XCVU5P (AMD Virtex UltraScale+), XCVU7P (AMD Virtex UltraScale+), XC7VX1140T (AMD Virtex-7).
Which software is used to design with the GX 2100?
Designs for the GX 2100 are built with Altera Quartus Prime.
Other Stratix 10 GX/SX devices
| Device | LUT4-eq. | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe |
|---|---|---|---|---|---|---|---|
| GX 400 | 256K 128K ALMs | 378K LE | 648 | 30 Mb | 374 | 24 XCVR/XCVR 28.3 Gb/s | Gen3 |
| SX 400 | 256K 128K ALMs | 378K LE | 648 | 30 Mb | 374 | 24 XCVR/XCVR 28.3 Gb/s | Gen3 |
| GX 650 | 415K 207K ALMs | 612K LE | 1,152 | 49 Mb | 392 | 24 XCVR/XCVR 28.3 Gb/s | Gen3 |
| SX 650 | 415K 207K ALMs | 612K LE | 1,152 | 49 Mb | 392 | 24 XCVR/XCVR 28.3 Gb/s | Gen3 |
| GX 850 | 570K 285K ALMs | 841K LE | 2,016 | 68 Mb | 688 | 48 XCVR/XCVR 28.3 Gb/s | Gen3 |
| SX 850 | 570K 285K ALMs | 841K LE | 2,016 | 68 Mb | 688 | 48 XCVR/XCVR 28.3 Gb/s | Gen3 |
| GX 1100 | 899K 449K ALMs | 1325K LE | 2,592 | 107 Mb | 688 | 48 XCVR/XCVR 28.3 Gb/s | Gen3 |
| SX 1100 | 899K 449K ALMs | 1325K LE | 2,592 | 107 Mb | 688 | 48 XCVR/XCVR 28.3 Gb/s | Gen3 |
| GX 1650 | 1101K 551K ALMs | 1624K LE | 3,145 | 114 Mb | 704 | 96 XCVR/XCVR 28.3 Gb/s | Gen3 |
| SX 1650 | 1101K 551K ALMs | 1624K LE | 3,145 | 114 Mb | 704 | 96 XCVR/XCVR 28.3 Gb/s | Gen3 |
| GX 2100 | 1359K 680K ALMs | 2005K LE | 3,744 | 127 Mb | 704 | 96 XCVR/XCVR 28.3 Gb/s | Gen3 |
| SX 2100 | 1359K 680K ALMs | 2005K LE | 3,744 | 127 Mb | 704 | 96 XCVR/XCVR 28.3 Gb/s | Gen3 |
| GX 2500 | 1642K 821K ALMs | 2422K LE | 5,011 | 195 Mb | 1,160 | 96 XCVR/XCVR 28.3 Gb/s | Gen3 |
| SX 2500 | 1642K 821K ALMs | 2422K LE | 5,011 | 195 Mb | 1,160 | 96 XCVR/XCVR 28.3 Gb/s | Gen3 |
| GX 2800 | 1866K 933K ALMs | 2753K LE | 5,760 | 229 Mb | 1,160 | 96 XCVR/XCVR 28.3 Gb/s | Gen3 |
| SX 2800 | 1866K 933K ALMs | 2753K LE | 5,760 | 229 Mb | 1,160 | 96 XCVR/XCVR 28.3 Gb/s | Gen3 |
Source: Altera Stratix 10 GX/SX FPGA Product Table, 2025.09.23. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.