FPGA & adaptive SoC databook · online editionRev. 2026.10

Altera Stratix 10 TX FPGAs

The Altera Stratix 10 TX family has 7 devices, built on the 14 nm process, ranging from 128K ALMs to 933K ALMs and from 648 to 5,760 variable-precision DSP blocks. It uses adaptive logic modules (ALMs). Transceivers: GX, GXE, GXT, up to 57.8 Gb/s.

DeviceLUTsVendor logicDSPBlock RAMMax I/OTransceiversPCIeCoreScore
TX 400128,160 ALMs378K LE64830 Mb38424 GXE 57.8 Gb/s——
TX 850284,960 ALMs841K LE2,01668 Mb44072 GXE/GXT/GX 57.8 Gb/sGen3—
TX 1100449,280 ALMs1325K LE2,592107 Mb44072 GXE/GXT/GX 57.8 Gb/sGen3—
TX 1650569,200 ALMs1679K LE3,326120 Mb44096 GXE/GXT/GX 57.8 Gb/sGen3—
TX 2100702,720 ALMs2073K LE3,960134 Mb44096 GXE/GXT/GX 57.8 Gb/sGen3—
TX 2500821,150 ALMs2422K LE5,011195 Mb440144 GXE/GXT/GX 57.8 Gb/sGen3—
TX 2800933,120 ALMs2753K LE5,760229 Mb440144 GXE/GXT/GX 57.8 Gb/sGen3—

Source: Altera Stratix 10 TX FPGA Product Table, 2024.02.29.