EP4S100G5

The EP4S100G5 is a Stratix IV FPGA from Altera, built on a 40 nm process. It provides 212,480 adaptive logic modules (ALMs) (531,000 logic elements (LEs)), 424,960 flip-flops, 20.2 Mb of block RAM and 1,024 18×18 multipliers. It offers up to 769 user I/O pins and 48 XCVR/XCVR transceivers at up to 11.3 Gb/s, with hard PCI Express Gen2 blocks. It is available in 2 packages, from the H1517 (42.5 × 42.5 mm) to the F1932 (45 × 45 mm). Temperature grades: industrial. Designs are built with Altera Quartus Prime.

Specifications

Packages

Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).

Speed and temperature grades

Alternatives to the EP4S100G5

Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.

Compare side by side: EP4S100G5 vs 5AGXB7, EP4S100G5 vs 5AGXB5, EP4S100G5 vs XC6VHX380T, EP4S100G5 vs XC6VLX550T.

Compare the EP4S100G5 with up to three other FPGAs.

EP4S100G5 quick facts

How many LUTs does the EP4S100G5 have?

The EP4S100G5 has 212,480 adaptive logic modules (ALMs) (531,000 logic elements (les) as published by Altera). Logic block: adaptive logic module: fracturable 8-input LUT (one 6-input or two independent 4-input functions).

How many DSP blocks does the EP4S100G5 have?

The EP4S100G5 has 1,024 18×18 multipliers and 20.2 Mb of block RAM.

Does the EP4S100G5 have transceivers?

Yes, 48 XCVR/XCVR transceivers at up to 11.3 Gb/s.

What are the alternatives to the EP4S100G5?

Devices of similar size in other families include 5AGXB7 (Altera Arria V), 5AGXB5 (Altera Arria V), XC6VHX380T (AMD Virtex-6).

Which software is used to design with the EP4S100G5?

Designs for the EP4S100G5 are built with Altera Quartus Prime.

Other Stratix IV devices

Source: Altera Stratix IV Product Table, Product Catalog 2015. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.